Intel ADX: Difference between revisions
Content deleted Content added
→top: Cleanups; Linked one more article |
m Task 18 (cosmetic): eval 4 templates: hyphenate params (3×); |
||
| (37 intermediate revisions by 16 users not shown) | |||
| Line 1: | Line 1: | ||
'''Intel ADX''' ('''Multi-Precision Add-Carry Instruction Extensions''') is [[Intel]]'s [[arbitrary-precision arithmetic]] extension to the [[x86]] [[instruction set architecture]] (ISA). Intel ADX was first supported in the [[Broadwell (microarchitecture)|Broadwell microarchitecture]].<ref>{{cite web|url=http://software.intel.com/en-us/articles/intel-software-development-emulator |title=Intel Software Development Emulator |website=software.intel.com |date=July 23, 2013 |access-date=October 16, 2013}}</ref><ref>[https://software.intel.com/sites/default/files/319433-013b.pdf Intel Architecture Instruction Set Extensions Programming Reference] (Document number 319433-013B) // Intel, July 2012, Chapter 9: Additional new instructions</ref> |
|||
{{No footnotes|date=February 2014}} |
|||
The instruction set extension contains just two new instructions, though <code>MULX</code> from [[BMI2]] is also considered as a part of the large integer arithmetic support.<ref name="adcref">{{cite web |url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf |title= New Instructions Supporting Large Integer Arithmetic on Intel Architecture Processors |publisher=[[Intel]] |access-date=2 January 2015}}</ref> |
|||
'''Intel ADX''' ('''Multi-Precision Add-Carry Instruction Extensions''') is a set of extensions to the [[x86]] [[instruction set architecture]] for [[arbitrary-precision arithmetic]]. |
|||
Both instructions are more efficient variants of the existing <code>ADC</code> instruction, with the difference that each of the two new instructions affects only one flag, where <code>ADC</code> as a signed addition may set both overflow and carry flags, and as an old-style x86 instruction also reset the rest of the CPU flags. Having two versions affecting different flags means that two chains of additions with carry can be calculated in parallel.<ref name="adcref" /> |
|||
Intel ADX will be introduced as part of the [[Broadwell (microarchitecture)|Broadwell]] [[microarchitecture]]. |
|||
AMD added support in their processors for these instructions starting with [[Ryzen]]. |
|||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
| year = 2013 |
|||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
*{{url|http://www.hwinfo.com/txt/History3264.txt}} |
|||
{| class="wikitable" |
|||
<!--- Categories ---> |
|||
|- |
|||
[[Category:Articles created via the Article Wizard]] |
|||
! Instruction |
|||
| ⚫ | |||
! Description |
|||
| ⚫ | |||
|- |
|||
| <code>ADCX</code> |
|||
| Adds two unsigned integers plus carry, reading the carry from the carry flag and if necessary setting it there. Does not affect other flags than the carry. |
|||
|- |
|||
| <code>ADOX</code> |
|||
| Adds two unsigned integers plus carry, reading the carry from the overflow flag and if necessary setting it there. Does not affect other flags than the overflow. |
|||
|} |
|||
== References == |
|||
{{Reflist}} |
|||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
| ⚫ | |||
|access-date = 2013-09-10 |
|||
| ⚫ | |||
|archive-url = https://web.archive.org/web/20130929035331/http://download-software.intel.com/sites/default/files/319433-015.pdf |
|||
| ⚫ | |||
|url-status = dead |
|||
| ⚫ | |||
* {{cite web | url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf | title=New Instructions Supporting Large Integer Arithmetic on Intel® Architecture Processors}} |
|||
{{Intel}} |
|||
{{Multimedia extensions}} |
|||
| ⚫ | |||
| ⚫ | |||
{{ |
{{hardware-stub}} |
||
Latest revision as of 06:13, 17 January 2021
Intel ADX (Multi-Precision Add-Carry Instruction Extensions) is Intel's arbitrary-precision arithmetic extension to the x86 instruction set architecture (ISA). Intel ADX was first supported in the Broadwell microarchitecture.[1][2]
The instruction set extension contains just two new instructions, though MULX from BMI2 is also considered as a part of the large integer arithmetic support.[3]
Both instructions are more efficient variants of the existing ADC instruction, with the difference that each of the two new instructions affects only one flag, where ADC as a signed addition may set both overflow and carry flags, and as an old-style x86 instruction also reset the rest of the CPU flags. Having two versions affecting different flags means that two chains of additions with carry can be calculated in parallel.[3]
AMD added support in their processors for these instructions starting with Ryzen.
| Instruction | Description |
|---|---|
ADCX
|
Adds two unsigned integers plus carry, reading the carry from the carry flag and if necessary setting it there. Does not affect other flags than the carry. |
ADOX
|
Adds two unsigned integers plus carry, reading the carry from the overflow flag and if necessary setting it there. Does not affect other flags than the overflow. |
References
[edit]- ^ "Intel Software Development Emulator". software.intel.com. July 23, 2013. Retrieved October 16, 2013.
- ^ Intel Architecture Instruction Set Extensions Programming Reference (Document number 319433-013B) // Intel, July 2012, Chapter 9: Additional new instructions
- ^ a b "New Instructions Supporting Large Integer Arithmetic on Intel Architecture Processors" (PDF). Intel. Retrieved 2 January 2015.
External links
[edit]- Intel Architecture Instruction Set Extensions Programming Reference (PDF). Intel. July 2013. Archived from the original (PDF) on 2013-09-29. Retrieved 2013-09-10.
- "New Instructions Supporting Large Integer Arithmetic on Intel® Architecture Processors" (PDF).
 | This computer hardware article is a stub. You can help Wikipedia by expanding it. |