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{{Computer architecture bit widths}}
<small>
In [[computer architecture]], '''{{{1}}}-bit''' [[integer (computer science)|integer]]s, [[memory address]]es, or other [[Data (computing)|data]] units are those that are {{{1}}} [[bit]]s {{{2}}} wide. Also, {{{1}}}-bit [[central processing unit]] (CPU) and [[arithmetic logic unit]] (ALU) architectures are those that are based on [[processor register|register]]s, [[address bus]]es, or [[Bus (computing)|data bus]]es of that size.<noinclude>
{| align="right" class="toccolours" width="300" style="margin: 0 0 1em 1em"
{{Documentation}}
! style="background:#ccccff" align="center" colspan="12" | '''Processors'''
|-
| [[4-bit]] || [[8-bit]] || [[12-bit]] || [[16-bit]] || [[18-bit]] || [[24-bit]] || [[31-bit]] || [[32-bit]] || [[36-bit]] || [[48-bit]] || [[64-bit]] || [[128-bit]]
|-
! style="background:#ccccff" align="center" colspan="12" | '''Applications'''
|-
| [[8-bit_application|8-bit]] || &nbsp; || &nbsp; || [[16-bit_application|16-bit]] || &nbsp; || &nbsp; || [[31-bit_application|31-bit]] || [[32-bit_application|32-bit]] || &nbsp; || &nbsp; || [[64-bit_application|64-bit]] || &nbsp;
|-
! style="background:#ccccff" align="center" colspan="12" | '''Data Sizes'''
|-
|colspan="12" align="center"|[[nibble]] &nbsp; [[byte]] &nbsp; [[octet (computing)|octet]] &nbsp; [[Word (computing)|word]] &nbsp; [[Word (computing)#Dword and Qword|dword]] &nbsp; [[Word (computing)#Dword and Qword|qword]]
|}
</small>


</noinclude>
<includeonly>
[[Category:Data unit]]
</includeonly>

Latest revision as of 12:40, 15 January 2022

In computer architecture, {{{1}}}-bit integers, memory addresses, or other data units are those that are {{{1}}} bits {{{2}}} wide. Also, {{{1}}}-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size.