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#REDIRECT [[System on a chip]] |
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A '''multiprocessor system on a chip''' ({{Abbr|'''MPSoC'''|Multi-processor System on a Chip}}''',''' {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|'|s|ɒ|k}} ''{{respell|em|pee|SOCK}}'' or {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|ˌ|ɛ|s|ˌ|oʊ|ˈ|s|iː|}} {{respell|em|PEE|ess|oh|SEE}}) is a [[system on a chip]] (SoC) which includes multiple [[microprocessors]]. As such, it is a [[multi-core]] system on a chip. |
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MPSoCs are usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and [[Input/output|I/O]] components. All these components are linked to each other by an on-chip interconnect, such as [[bus (computing)|buses]] and [[Network-on-Chip|Networks on chip]] (NoCs). These [[Computer architecture|architectures]] meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of [[Application-specific integrated circuit|specialised processing elements]] and architecture. |
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== Structure == |
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{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}} |
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A multiprocessor system on a chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. Additionally, MPSoCs typically contain: |
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* Memory blocks, often using [[scratchpad RAM]] and [[direct memory access]] |
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*[[Clock generator|timing sources]] to generate [[clock signal|clock signals]] to control execution of SoC functions |
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**[[Crystal oscillator|crystal oscillators]] and [[Phase-locked loop|phase-locked loops]] are popular clock generators. |
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* peripherals including [[Counter (digital)|counters]] and [[power-on reset]] generators |
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* external [[Electrical connector|interfaces]], typically for [[Communication protocol|communication protocols]] |
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** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc. |
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** each interface is typically to one given core or logical unit on the MPSoC |
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*a [[network on a chip]] (NoC) to communicate and share data between the processors and [[Functional unit|functional units]] of the MPSoC |
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== Applications == |
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{{Expand section|date=October 2018}} |
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MPSoCs are used when [[Microcontroller|microcontrollers]] or systems-on-chip must have [[multiprocessing]] capabilities. This can include [[smartphone]] devices, [[Embedded system|embedded systems]], [[Digital signal processor|digital signal processors]] and other various applications. |
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==Examples== |
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This section is a short list of multiprocessor systems-on-chip. |
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*[[Cell (microprocessor)|Cell processor]] |
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*[[Adapteva]]'s Epiphany architecture |
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*[[Xilinx]] Zynq UltraScale |
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== Design considerations == |
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{{Empty section|date=October 2018}} |
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==Benchmarks== |
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MPSoC [[research and development]] often compares many options. Benchmarks, such as COSMIC,<ref>{{Cite web|url=http://www.ece.ust.hk/~eexu/COSMIC.html|title=COSMIC|website=www.ece.ust.hk|access-date=2018-10-11}}</ref> are developed to help such evaluations. |
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==See also== |
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*[[System on a chip]], of which an MPSoC is a subtype. |
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*[[Manycore processor]] |
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*[[Parallel computing]] |
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*[[Programmable system on a chip]] (PSoc) |
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*[[ARM big.LITTLE]] co-architecture |
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*[[Hardware acceleration]] |
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==References== |
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{{reflist}} |
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==External links== |
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* [https://web.archive.org/web/20130614083645/http://mpsoc-forum.org/ MPSoC - Annual Conference on MPSoC] |
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* [https://web.archive.org/web/20090215035428/http://www.u-aizu.ac.jp/~benab/conferences/mcsoc-09/ Annual Symposium] |
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{{compu-hardware-stub}} |
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[[Category:Microprocessors]] |
[[Category:Microprocessors]] |
Latest revision as of 17:26, 15 November 2023
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