Multiprocessor system on a chip: Difference between revisions
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The '''multiprocessor system-on-chip''' ('''MPSoC''') is a [[system-on-a-chip]] (SoC) which uses multiple processors (see [[multi-core]]), usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using [[scratchpad RAM]] and [[direct memory access|DMA]]) and I/O components. All these components are linked to each other by an [[Network on a chip|on-chip interconnect]]. These architectures meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of specialised processing elements and architecture. |
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==Benchmarks== |
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MPSoC research and development often compares many options. Benchmarks, such as COSMIC,<ref>[http://www.ece.ust.hk/~eexu/COSMIC.html "COSMIC Heterogeneous Multiprocessor Benchmark Suite"]</ref> are developed to help such evaluations. |
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==Examples== |
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*[[Cell_(microprocessor)|CELL processor]] |
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*[[Adapteva|Adapteva epiphany architecture]] |
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==See also== |
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*[[Multi-core (computing)]] |
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*[[manycore]] |
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*[[Multiprocessing]] |
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*[[Symmetric multiprocessing]] (SMP) |
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*[[Computer multitasking|multitasking]] |
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*[[Parallel computing]] |
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*[[Vision Processing Unit]] |
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==References== |
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{{reflist}} |
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==External links== |
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* [http://www.mpsoc-forum.org/ MPSoC - Annual Conference on MPSoC] |
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* [http://www.u-aizu.ac.jp/%7Ebenab/conferences/mcsoc-09/ Annual Symposium] |
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{{compu-hardware-stub}} |
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[[Category:Microprocessors]] |
[[Category:Microprocessors]] |
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Latest revision as of 17:26, 15 November 2023
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