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#REDIRECT [[System on a chip]]
A '''multiprocessor system-on-chip''' ({{Abbr|'''MPSoC'''|Multi-processor System on a Chip}}''',''' {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|'|s|ɒ|k}} ''{{respell|em|pee|SOCK}}'' or {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|ˌ|ɛ|s|ˌ|oʊ|ˈ|s|iː|}} {{respell|em|PEE|ess|oh|SEE}}) is a [[system-on-a-chip]] (SoC) which includes multiple [[microprocessors]]. As such, it is a [[multi-core]] System-on-Chip.

MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and [[Input/output|I/O]] components. All these components are linked to each other by an on-chip interconnect, such as [[bus (computing)|buses]] and [[Network-on-Chip|Networks on chip]] (NoCs). These [[Computer architecture|architectures]] meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of [[Application-specific integrated circuit|specialised processing elements]] and architecture.

== Structure ==
{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}}

A multiprocessor system-on-chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. Additionally, MPSoCs typically contain:

* Memory blocks, often using [[scratchpad RAM]] and [[direct memory access]]

*[[Clock generator|timing sources]] to generate [[clock signal|clock signals]] to control execution of SoC functions
**[[Crystal oscillator|crystal oscillators]] and [[Phase-locked loop|phase-locked loops]] are popular clock generators.
* peripherals including [[Counter (digital)|counters]] and [[power-on reset]] generators
* external [[Electrical connector|interfaces]], typically for [[Communication protocol|communication protocols]]
** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc.
** each interface is typically to one given core or logical unit on the MPSoC
*a [[Network on a chip|network-on-chip]] (NoC) to communicate and share data between the processors and [[Functional unit|functional units]] of the MPSoC

== Applications ==
{{Expand section|date=October 2018}}
MPSoCs are used when [[Microcontroller|microcontrollers]] or systems-on-chip must have [[multiprocessing]] capabilities. This can include [[smartphone]] devices, [[Embedded system|embedded systems]], [[Digital signal processor|digital signal processors]] and other various applications.

==Examples==
This section is a short list of multiprocessor systems-on-chip.

*[[Raspberry Pi]] 2 and later
*[[Cell_(microprocessor)|CELL processor]]
*[[Adapteva|Adapteva's Epiphany architecture]]

== Design considerations ==
{{Empty section|date=October 2018}}

==Benchmarks==
MPSoC [[research and development]] often compares many options. Benchmarks, such as COSMIC,<ref>{{Cite web|url=http://www.ece.ust.hk/~eexu/COSMIC.html|title=COSMIC|website=www.ece.ust.hk|access-date=2018-10-11}}</ref> are developed to help such evaluations.

==See also==

*[[System on a chip]], of which an MPSoC is a subtype.
*[[Manycore processor]]
*[[Parallel computing]]
*[[Programmable system-on-chip]] (PSoc)
*[[ARM big.LITTLE]] co-architecture
*[[Hardware acceleration]]

==References==
{{reflist}}

==External links==
* [http://www.mpsoc-forum.org/ MPSoC - Annual Conference on MPSoC]
* [http://www.u-aizu.ac.jp/%7Ebenab/conferences/mcsoc-09/ Annual Symposium]

{{compu-hardware-stub}}


[[Category:Microprocessors]]
[[Category:Microprocessors]]

Latest revision as of 17:26, 15 November 2023

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