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The '''Compact Model Coalition''' (formerly the '''Compact Model Council''')<ref>{{cite web|url=http://www.geia.org/index.asp?bid=597 |title=CMC - Compact Model Council |publisher=Government Electronics & Information Technology Association (GEIA) |deadurl=yes |archiveurl=https://web.archive.org/web/20110511071827/http://www.geia.org/index.asp?bid=597 |archivedate=2011-05-11 |df= }}</ref> is a working group in the [[Electronic Design Automation]] industry formed to choose, maintain and promote the use of standard [[Semiconductor device modeling|semiconductor device models]].<ref>{{cite web|url=http://www.geia.org/index.asp?bid=1333 |title=Standard Models and Downloads |publisher=Government Electronics & Information Technology Association (GEIA) |deadurl=yes |archiveurl=https://web.archive.org/web/20110720190121/http://www.geia.org/index.asp?bid=1333 |archivedate=2011-07-20 |df= }}</ref> Commercial and industrial analog simulators (such as [[SPICE]]) need to add device models as technology advances (see [[Moore's law]]) and earlier models become inaccurate. Before this group was formed, new [[transistor models]] were largely proprietary, which severely limited the choice of simulators that could be used.
The '''Compact Model Coalition''' (formerly the '''Compact Model Council''')<ref>{{cite web|url=http://www.geia.org/index.asp?bid=597 |title=CMC - Compact Model Council |publisher=Government Electronics & Information Technology Association (GEIA) |url-status=dead |archiveurl=https://web.archive.org/web/20110511071827/http://www.geia.org/index.asp?bid=597 |archivedate=2011-05-11 }}</ref> is a working group in the [[Electronic Design Automation]] industry formed to choose, maintain and promote the use of standard [[Semiconductor device modeling|semiconductor device models]].<ref>{{cite web|url=http://www.geia.org/index.asp?bid=1333 |title=Standard Models and Downloads |publisher=Government Electronics & Information Technology Association (GEIA) |url-status=dead |archiveurl=https://web.archive.org/web/20110720190121/http://www.geia.org/index.asp?bid=1333 |archivedate=2011-07-20 }}</ref> Commercial and industrial analog simulators (such as [[SPICE]]) need to add device models as technology advances (see [[Moore's law]]) and earlier models become inaccurate. Before this group was formed, new [[transistor models]] were largely proprietary, which severely limited the choice of simulators that could be used.


It was formed in August, 1996, for the purpose developing and standardizing the use and implementation of SPICE models and the model interfaces. In May 2013, the [[Silicon Integration Initiative]] (Si2) and [[TechAmerica]] announced the transfer of the Compact Model Council to Si2 and a renaming to Compact Model Coalition.<ref name="si2">{{Cite web
It was formed in August, 1996, for the purpose developing and standardizing the use and implementation of SPICE models and the model interfaces. In May 2013, the [[Silicon Integration Initiative]] (Si2) and [[TechAmerica]] announced the transfer of the Compact Model Council to Si2 and a renaming to Compact Model Coalition.<ref name="si2">{{Cite web
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*BSIM3,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsim4/bsim3/|title=BSIM3 Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a [[MOSFET]] model from [[UC Berkeley]] (see [[BSIM]]).
*BSIM3,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsim4/bsim3/|title=BSIM3 Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a [[MOSFET]] model from [[UC Berkeley]] (see [[BSIM]]).
*BSIM4,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsim4/|title=BSIM4 Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a more modern MOSFET model, also from UC Berkeley.
*BSIM4,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsim4/|title=BSIM4 Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a more modern MOSFET model, also from UC Berkeley.
*PSP,<ref>{{cite web |url=http://pspmodel.asu.edu/ |title=PSP |publisher=ASU}}</ref> another MOSFET model. PSP originally stood for [[Pennsylvania State University|Penn State]]-[[Philips]], but one author moved to [[Arizona State University|ASU]], and Philips spun off their semiconductor group as [[NXP Semiconductors]].
*PSP,<ref>{{cite web |url=http://pspmodel.asu.edu/ |title=PSP |publisher=ASU |url-status=dead |archiveurl=https://web.archive.org/web/20071017140132/http://pspmodel.asu.edu/ |archivedate=2007-10-17 }}</ref><ref>{{cite web |url=https://www.cea.fr/cea-tech/leti/pspsupport/Pages/Welcome.aspx|title=PSP |date=19 October 2013 |publisher=CEA-Leti|access-date=2023-08-17 }}</ref> another MOSFET model. PSP originally stood for [[Pennsylvania State University|Penn State]]-[[Philips]], but one author moved to [[Arizona State University|ASU]], and Philips spun off their semiconductor group as [[NXP Semiconductors]]. PSP is now developed and supported at [[CEA-Leti: Laboratoire d'électronique des technologies de l'information|CEA-Leti]].
*BSIMSOI,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsimsoi/|title=BSIM-SOI Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a model for [[silicon on insulator]] MOSFETs.
*BSIMSOI,<ref>{{cite web|url=http://bsim.berkeley.edu/models/bsimsoi/|title=BSIM-SOI Model|last=|first=|date=|website=|publisher=BSIM Group, UC Berkeley|access-date=}}</ref> a model for [[silicon on insulator]] MOSFETs.
*L-UTSOI,<ref>{{cite web|url=https://www.cea.fr/cea-tech/leti/l-utsoisupport/Pages/Welcome.aspx|title=L-UTSOI Model|last=|first=|date=19 October 2013|website=|publisher=CEA-Leti|access-date=2023-08-17}}</ref> a model for fully-depleted [[silicon on insulator]] MOSFETs, developed and supported by [[CEA-Leti: Laboratoire d'électronique des technologies de l'information|CEA-Leti]].
*HICUM<ref>{{cite web |url=http://www.iee.et.tu-dresden.de/iee/eb/hic_new/hic_start.html |title=HICUM Introduction |publisher=TU Dresden |author=M. Schröter, L.Hofmann}}</ref> or HIgh CUrrent Model for [[bipolar transistor]]s, from CEDIC, [[Dresden University of Technology]], Germany, and [[UC San Diego]], USA.
*HICUM<ref>{{cite web |url=http://www.iee.et.tu-dresden.de/iee/eb/hic_new/hic_start.html |title=HICUM Introduction |publisher=TU Dresden |author=M. Schröter, L.Hofmann}}</ref> or HIgh CUrrent Model for [[bipolar transistor]]s, from CEDIC, [[Dresden University of Technology]], Germany, and [[UC San Diego]], USA.
*MEXTRAM,<ref>{{cite web |url=http://mextram.ewi.tudelft.nl/ |title=MEXTRAM Homepage|publisher=TU Delft}}</ref> a compact model for bipolar transistors that aims to support the design of bipolar transistor circuits at high frequencies in Si and SiGe based process technologies. MEXTRAM is developed and supported at [[Delft University of Technology]].
*MEXTRAM,<ref>{{cite web |url=http://www.eng.auburn.edu/~niuguof/mextram/index.html |title=MEXTRAM Homepage|publisher=Auburn University}}</ref> a compact model for bipolar transistors that aims to support the design of bipolar transistor circuits at high frequencies in Si and SiGe based process technologies. MEXTRAM was originally developed at [[NXP Semiconductors]] and is now developed and supported at [[Auburn University]].
*ASM-HEMT,<ref>{{cite web |url=http://www.iitk.ac.in/asm/ |title=ASM-HEMT Homepage|publisher=IIT Kanpur}}</ref> and MVSG,<ref>{{cite web|url=http://www.si2.org/wordpress/wp-content/uploads/2018/05/MVSG_CMC_APR_2018.zip|title=MVSG Source code|publisher=MIT, hosted by Si2|access-date=2018-05-08|archive-url=https://web.archive.org/web/20180509013241/http://www.si2.org/wordpress/wp-content/uploads/2018/05/MVSG_CMC_APR_2018.zip|archive-date=2018-05-09|url-status=dead}}</ref> the newest standard models for [[Gallium Nitride]] (GaN) transistors.

To address the increasing need for Reliability (ageing) simulation the CMC nominated the OMI Interface as the new EDA vendor independent solution for ageing simulations. Technically the Interface is very close the TMI2 Interface developed by [[TSMC]]. The standardization will allow Silicon Foundries to develop a common set of aging models that will work with all significant analog simulators.


== See also ==
== See also ==
* [[Electronic circuit simulation]]
* [[Electronic circuit simulation]]


⚫
== References ==
{{Reflist}}


== External links ==
== External links ==
* [http://www.si2.org/cmc_members_list.php Member list at CMC website]
* [http://www.si2.org/cmc_members_list.php Member list at CMC website]
* [https://www.si2.org/cmc_index.php Site map of CMC website including links to working groups]
* [https://www.si2.org/cmc_index.php Site map of CMC website including links to working groups]

⚫
== References ==
<references/>


[[Category:Transistor modeling]]
[[Category:Transistor modeling]]

Latest revision as of 02:18, 12 December 2023

The Compact Model Coalition (formerly the Compact Model Council)[1] is a working group in the Electronic Design Automation industry formed to choose, maintain and promote the use of standard semiconductor device models.[2] Commercial and industrial analog simulators (such as SPICE) need to add device models as technology advances (see Moore's law) and earlier models become inaccurate. Before this group was formed, new transistor models were largely proprietary, which severely limited the choice of simulators that could be used.

It was formed in August, 1996, for the purpose developing and standardizing the use and implementation of SPICE models and the model interfaces. In May 2013, the Silicon Integration Initiative (Si2) and TechAmerica announced the transfer of the Compact Model Council to Si2 and a renaming to Compact Model Coalition.[3]

New models are submitted to the Coalition, where their technical merits are discussed, and then potential standard models are voted on.[4]

Some of the models supported by the Compact Modeling Coalition include:

To address the increasing need for Reliability (ageing) simulation the CMC nominated the OMI Interface as the new EDA vendor independent solution for ageing simulations. Technically the Interface is very close the TMI2 Interface developed by TSMC. The standardization will allow Silicon Foundries to develop a common set of aging models that will work with all significant analog simulators.

See also

[edit]

References

[edit]
  1. ^ "CMC - Compact Model Council". Government Electronics & Information Technology Association (GEIA). Archived from the original on 2011-05-11.
  2. ^ "Standard Models and Downloads". Government Electronics & Information Technology Association (GEIA). Archived from the original on 2011-07-20.
  3. ^ "CMC Moves to Si2". Silicon Integration Initiative, Inc. Retrieved 2015-10-19.
  4. ^ Dylan McGrath. "SIMULATION: PSP transistor tapped for standard". EETimes.
  5. ^ "BSIM3 Model". BSIM Group, UC Berkeley.
  6. ^ "BSIM4 Model". BSIM Group, UC Berkeley.
  7. ^ "PSP". ASU. Archived from the original on 2007-10-17.
  8. ^ "PSP". CEA-Leti. 19 October 2013. Retrieved 2023-08-17.
  9. ^ "BSIM-SOI Model". BSIM Group, UC Berkeley.
  10. ^ "L-UTSOI Model". CEA-Leti. 19 October 2013. Retrieved 2023-08-17.
  11. ^ M. Schröter, L.Hofmann. "HICUM Introduction". TU Dresden.
  12. ^ "MEXTRAM Homepage". Auburn University.
  13. ^ "ASM-HEMT Homepage". IIT Kanpur.
  14. ^ "MVSG Source code". MIT, hosted by Si2. Archived from the original on 2018-05-09. Retrieved 2018-05-08.
[edit]
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