Jump to content

Parity bit: Difference between revisions

From Wikipedia, the free encyclopedia
Content deleted Content added
See also: 8-N-1 is an encoding with no parity bit. Let's not list it.
 
(460 intermediate revisions by more than 100 users not shown)
Line 1: Line 1:
{{Short description|Bit added to a binary string for error detection}}
{| border="1" cellspacing="0" cellpadding="2" style="float: right; border-collapse: collapse;"
{{broader|Parity (mathematics)}}
| style="width: 34%; background: #efefef;" align=center rowspan=2 | 7 bits of data
{{more citations needed|date=January 2022}}
| style="background: #efefef;" align=center colspan=2 | byte with parity bit

|-
| style="width: 33%; background: #efefef;" align=center | even
{| class="wikitable" style="float: right; text-align: center; margin: 1em;"
|-
| style="width: 33%; background: #efefef;" align=center | odd
! rowspan="2" | 7 bits of data<br/>
! rowspan="2" | (count of 1-bits)
! colspan="2" | 8 bits including parity
|-
|-
! even
| 0000000
! odd
| '''0'''0000000
|-
| '''1'''0000000
| 0000000
|0
| 0000000'''0'''
| 0000000'''1'''
|-
|-
| 1010001
| 1010001
| 3
| '''1'''1010001
| '''0'''1010001
| 1010001'''1'''
| 1010001'''0'''
|-
|-
| 1101001
| 1101001
|4
| '''0'''1101001
| '''1'''1101001
| 1101001'''0'''
| 1101001'''1'''
|-
| 1111111
|-
| 1111111
|7
| '''1'''1111111
| '''0'''1111111
| 1111111'''1'''
| 1111111'''0'''
|}
|}
A '''parity bit''' is a [[binary digit]] that indicates whether the number of bits with value of [[1 (number)|one]] in a given set of bits is [[even number|even]] or [[odd number|odd]]. Parity bits are used as the simplest [[Error detection and correction|error detecting code]].


A '''parity bit''', or '''check bit''', is a [[bit]] added to a string of [[binary code]]. Parity bits are a simple form of [[Error detection and correction|error detecting code]]. Parity bits are generally applied to the smallest units of a communication protocol, typically 8-bit [[octet (computing)|octets]] (bytes), although they can also be applied separately to an entire message string of bits.
There are two types of parity bits: '''even parity bit''' and '''odd parity bit'''. An even parity bit is set to 1 if the number of ones in a given set of bits is odd (making the total number of ones even). An odd parity bit is set to 1 if the number of ones in a given set of bits is even (making the total number of ones odd). Even parity is actually a special case of a [[cyclic redundancy check]] (CRC), where the 1-bit CRC is generated by the [[polynomial]] ''x''+1.

The parity bit ensures that the [[Hamming weight|total number of 1-bits]] in the string is [[Even and odd numbers|even or odd]].<ref>{{Cite book |title=Principles of communication : systems, modulation, and noise |last1=Ziemer |first1=RodgerE. |last2=Tranter |first2=William H. |date=17 March 2014 |isbn=9781118078914 |edition=Seventh |location=Hoboken, New Jersey |oclc=856647730}}</ref> Accordingly, there are two variants of parity bits: '''even parity bit''' and '''odd parity bit'''. In the case of even parity, for a given set of bits, the bits whose value is 1 are counted. If that count is odd, the parity bit value is set to 1, making the total count of occurrences of 1s in the whole set (including the parity bit) an even number. If the count of 1s in a given set of bits is already even, the parity bit's value is 0. In the case of odd parity, the coding is reversed. For a given set of bits, if the count of bits with a value of 1 is even, the parity bit value is set to 1 making the total count of 1s in the whole set (including the parity bit) an odd number. If the count of bits with a value of 1 is odd, the count is already odd so the parity bit's value is 0. Even parity is a special case of a [[cyclic redundancy check]] (CRC), where the 1-bit CRC is generated by the [[polynomial]] ''x''+1.

==Parity==
In mathematics ''[[parity (mathematics)|parity]]'' can refer to the evenness or oddness of an integer, which, when written in its [[binary numeral system|binary form]], can be determined just by examining only its [[least significant bit]].

In information technology parity refers to the evenness or oddness, given any set of binary digits, of the number of those bits with value one. Because parity is determined by the state of every one of the bits, this property of parity—being dependent upon all the bits and changing its value from even to odd parity if any one bit changes—allows for its use in error detection and correction schemes.

In telecommunications the parity referred to by some protocols is for error-''detection''. The transmission medium is preset, at both end points, to agree on either odd parity or even parity. For each string of bits ready to transmit (data packet) the sender calculates its parity bit, zero or one, to make it conform to the agreed parity, even or odd. The receiver of that packet first checks that the parity of the packet as a whole is in accordance with the preset agreement, then, if there was a parity error in that packet, requests a retransmission of that packet.

In computer science the parity stripe or parity disk in a [[RAID]] provides [[Error detection and correction#Parity bits|error-''correction'']]. Parity bits are written at the rate of one parity bit per ''n'' bits, where ''n'' is the number of disks in the array. When a read error occurs, each bit in the error region is recalculated from its set of ''n'' bits. In this way, using one parity bit creates "redundancy" for a region from the size of one bit to the size of one disk. See {{section link||Redundant Array of Independent Disks}} below.

In electronics, transcoding data with parity can be very efficient, as [[XOR#More that two inputs|XOR]] gates output what is equivalent to a check bit that creates an even parity, and XOR logic design easily scales to any number of inputs. XOR and AND structures comprise the bulk of most integrated circuitry.


==Error detection==
==Error detection==
[[File:RS232 Oscilloscope Trace K-7E1.svg|thumb|Diagrammatic oscilloscope trace of voltage levels for a RS232 transmission of a 7 bit [[ASCII]] "K" character (4Bh&nbsp;= 1001011b) framed as 1 start bit, 7 data bits (least significant bit first), even parity, and 1 stop bit: 7E1.]]
If an odd number of bits (including the parity bit) are changed in [[Transmission (telecommunications)|transmission]] of a set of bits then parity bit will be incorrect and will thus indicate that an error in transition has occurred. Therefore, parity bit is an error detecting code, but is not an error correcting code as there is no way to determine which particular bit is corrupted. The data must be discarded entirely, and re-transmitted from scratch. On a noisy transmission medium a successful transmission could take a long time, or even never occur. Parity does have the advantage, however, that it is about the best possible code that uses only a single bit of space and it requires only a number of [[XOR gate]]s to generate. See [[Hamming code]] for an example of an error-correcting code.


If an odd number of bits (including the parity bit) are [[Transmission (telecommunications)|transmitted]] incorrectly, the parity bit will be incorrect, thus indicating that a '''parity error''' occurred in the transmission. The parity bit is suitable only for detecting errors; it cannot [[Error correction code|correct]] any errors, as there is no way to determine the particular bit that is corrupted. The data must be discarded entirely, and [[automatic repeat-request|retransmitted from scratch]]. On a noisy transmission medium, successful transmission can therefore take a long time or even never occur. However, parity has the advantage that it uses only a single bit and requires only a number of [[XOR gate]]s to generate. See [[Hamming code]] for an example of an error-correcting code.
For example, our parity bit can be computed as follows assuming we are sending a simple 4-bit value 1001 (the parity bit is the leftmost bit of the sent/received values):


Parity bit checking is used occasionally for transmitting [[ASCII]] characters, which have 7 bits, leaving the 8th bit as a parity bit.
A computes even parity: 1^0^0^1 = 0
A sends: 01001
B receives: 01001
B validates even parity: 1^0^0^1 = 0


For example, the parity bit can be computed as follows. Assume [[Alice and Bob]] are communicating and Alice wants to send Bob the simple 4-bit message 1001.
A computes odd parity: ~(1^0^0^1) = 1
{| class="wikitable"
A sends: 11001
|-
B receives: 11001
! Type of bit parity !! Successful transmission scenario
B validates odd parity: ~(1^0^0^1) = 1
|-
| Even parity ||
Alice wants to transmit: 1001 and 1011


Alice computes parity bit value: <br>1+0+0+1 (mod 2) = 0
This mechanism enables the detection of single bit errors, because if one bit gets flipped due to line noise, there will be an incorrect number of ones in the received data. In the two examples above, B's calculated parity value matches the parity bit in its received value, indicating there are no single bit errors. Consider the following example assuming even parity when sending 4-bit value 0010 (the parity bit is the leftmost bit of the sent/received values):
<br>1+0+1+1 (mod 2) = 1


A computes even parity: 0^0^1^0 = 1
Alice adds parity bit and sends: <br>1001'''0''' and 1011'''1'''
A sends: 10010
*** TRANSMISSION ERROR ***
B receives: 11010
B validates even parity: 1^0^1^0 = 0


Bob receives: 10010 and 10111
B's calculated parity value (0) does not match the parity bit (1) in its received value, indicating the bit error. Here's the same example (even parity, value 0010) but now the parity bit itself gets corrupted:


A computes even parity: 0^0^1^0 = 1
Bob computes parity: <br>1+0+0+1+0 (mod 2) = 0
<br>1+0+1+1+1 (mod 2) = 0
A sends: 10010
*** TRANSMISSION ERROR ***
B receives: 00010
B validates even parity: 0^0^1^0 = 1


Bob reports correct transmission after observing expected even result.
Once again, B's calculated parity value (1) does not match the parity bit (0) in its received value, indicating the bit error.
|-
| Odd parity ||
Alice wants to transmit: 1001 and 1011


Alice computes parity bit value:
There is a limitation to parity schemes. A parity bit is only guaranteed to detect an odd number of bit errors. If an even number of bits have errors, the parity bit records the correct number of ones, even though the data is corrupt. (See also [[error detection and correction]].) Consider the same example as before (even parity, value 0010) with an even number of flipped bits:
<br>1+0+0+1 (+ 1 mod 2) = 1
<br>1+0+1+1 (+ 1 mod 2) = 0


A computes even parity: 0^0^1^0 = 1
Alice adds parity bit and sends: <br>1001'''1''' and 1011'''0'''
A sends: 10010
*** TRANSMISSION ERROR ***
B receives: 11011
B validates even parity: 1^0^1^1 = 1


Bob receives: 10011 and 10110
B's calculated parity value (1) matches the parity bit (1) in its received value, masking the two bit errors.

Bob computes overall parity: <br>1+0+0+1+1 (mod 2) = 1
<br>1+0+1+1+0 (mod 2) = 1

Bob reports correct transmission after observing expected odd result.
|}

This mechanism enables the detection of single bit errors, because if one bit gets flipped due to line noise, there will be an incorrect number of ones in the received data. In the two examples above, Bob's calculated parity value matches the parity bit in its received value, indicating there are no single bit errors. Consider the following example with a transmission error in the second bit using XOR:

{| class="wikitable"
|-
! Type of bit parity error !! Failed transmission scenario
|-
| Even parity
Error in the second bit
|| Alice wants to transmit: 1001

Alice computes parity bit value: 1^0^0^1 = 0

Alice adds parity bit and sends: 10010

'''...TRANSMISSION ERROR...'''

Bob receives: 1'''1'''010

Bob computes overall parity: 1^1^0^1^0 = 1

Bob reports incorrect transmission after observing unexpected odd result.
|-
| Even parity
Error in the parity bit
||Alice wants to transmit: 1001

Alice computes even parity value: 1^0^0^1 = 0

Alice sends: 10010

'''...TRANSMISSION ERROR...'''

Bob receives: 1001'''1'''

Bob computes overall parity: 1^0^0^1^1 = 1

Bob reports incorrect transmission after observing unexpected odd result.
|}

There is a limitation to parity schemes. A parity bit is guaranteed to detect only an odd number of bit errors. If an even number of bits have errors, the parity bit records the correct number of ones even though the data is corrupt. (See also [[error detection and correction]].) Consider the same example as before but with an even number of corrupted bits:

{| class="wikitable"
|-
! Type of bit parity error !! Failed transmission scenario
|-
| Even parity
Two corrupted bits
|| Alice wants to transmit: 1001

Alice computes even parity value: 1^0^0^1 = 0

Alice sends: 10010

'''...TRANSMISSION ERROR...'''

Bob receives: 1'''1'''01'''1'''

Bob computes overall parity: 1^1^0^1^1 = 0

Bob reports correct transmission though actually incorrect.
|}
Bob observes even parity, as expected, thereby failing to catch the two bit errors.


==Usage==
==Usage==
Because of its simplicity, parity is used in many [[computer hardware|hardware]] applications where an operation can be repeated in case of difficulty, or where simply detecting the error is helpful. For example, the [[SCSI]] bus uses parity to detect transmission errors, and many [[microprocessor]] instruction [[cache]]s include parity protection. Because the I-cache data is just a copy of [[main memory]], it can be thrown away and re-fetched if it is found to be corrupted.
Because of its simplicity, parity is used in many [[computer hardware|hardware]] applications in which an operation can be repeated in case of difficulty, or simply detecting the error is helpful. For example, the [[SCSI]] and [[PCI bus]]es use parity to detect transmission errors, and many [[microprocessor]] instruction [[CPU cache|caches]] include parity protection. Because the [[Instruction cache]] data is just a copy of the [[main memory]], it can be disregarded and refetched if it is found to be corrupted.

In [[serial communications|serial]] [[data transmission]], a common format is 7 data bits, an even parity bit, and one or two [[stop bit]]s. That format accommodates all the 7-bit [[ASCII]] characters in an 8-bit byte. Other formats are possible; 8 bits of data plus a parity bit can convey all 8-bit byte values.

In serial communication contexts, parity is usually generated and checked by interface hardware (such as a [[Universal asynchronous receiver-transmitter|UART]]) and, on reception, the result made available to a [[Processor (computing)|processor]] such as the CPU (and so too, for instance, the [[operating system]]) via a status bit in a [[hardware register]] in the [[Interface (computing)|interface]] hardware. Recovery from the error is usually done by retransmitting the data, the details of which are usually handled by software (such as the operating system I/O routines).

When the total number of transmitted bits, including the parity bit, is even, odd parity has the advantage that both all-zeros and all-ones patterns are detected as errors. If the total number of bits is odd, only one of the patterns is detected as an error, and the choice can be made based on what the more common error is expected to be.

=== RAID array ===
Parity data is used by RAID arrays ([[RAID|redundant array of independent/inexpensive disks]]) to achieve [[Redundancy (engineering)|redundancy]]. If a drive in the array fails, remaining data on the other drives can be combined with the parity data (using the Boolean [[XOR]] function) to reconstruct the missing data.

For example, suppose two drives in a three-drive [[RAID 4]] array contained the following data:

{|
|-
|Drive 1:
|'''01101101'''
|-
|Drive 2:
|'''11010100'''
|}

To calculate parity data for the two drives, an XOR is performed on their data:

{|
|-
|
|'''01101101'''
|-
|&nbsp;&nbsp;XOR&nbsp;&nbsp;&nbsp;&nbsp;
|<ins>'''11010100'''</ins>
|-
|
|'''10111001'''
|}

The resulting parity data, '''10111001''', is then stored on Drive 3.

Should any of the three drives fail, the contents of the failed drive can be reconstructed on a replacement drive by subjecting the data from the remaining drives to the same XOR operation. If Drive 2 were to fail, its data could be rebuilt using the XOR results of the contents of the two remaining drives, Drive 1 and Drive 3:

{|
|-
|Drive 1:
|'''01101101'''
|-
|Drive 3:
|'''10111001'''
|}

as follows:

{|
|-
| || '''01101101''' || Drive 1
|-
| XOR || <ins>'''10111001'''</ins> || Drive 3
|-
| || '''11010100''' || Reconstructed Drive 2
|}


The result of that XOR calculation yields Drive 2's contents. '''11010100''' is then stored on Drive 2, fully repairing the array.
In [[serial communications|serial]] [[data transmission]], a common format is 7 data bits, an even parity bit, and one or two [[stop bit]]s. This format neatly accommodates all the 7-bit [[ASCII]] characters in a convenient 8-bit byte. Other formats are possible; 8 bits of data plus a parity bit can convey all 8-bit byte values.


XOR logic is also equivalent to even parity (because ''a'' XOR ''b'' XOR ''c'' XOR ... may be treated as XOR(''a'',''b'',''c'',...), which is an n-ary operator that is true if and only if an odd number of arguments is true). So the same XOR concept above applies similarly to larger RAID arrays with parity, using any number of disks. In the case of a RAID 3 array of 12 drives, 11 drives participate in the XOR calculation shown above and yield a value that is then stored on the dedicated parity drive.
In serial communication contexts, parity is usually generated and checked by interface hardware (e.g., a [[UART]]) and, on reception, the result made available to the CPU (and so to, for instance, the [[operating system]]) via a status bit in a [[processor register|register]] in the interface hardware. Recovery from the error is usually done by retransmitting the data, the details of which are usually handled by software (e.g., the operating system I/O routines).


Extensions and variations on the parity bit mechanism "double," "dual," or "diagonal" parity, are used in [[Non-standard RAID levels#RAID-DP|RAID-DP]].
===Parity block===
A parity block is used by certain [[RAID]] levels. Redundancy is achieved by the use of parity blocks. If a single drive in the array fails, data blocks and a parity block from the working drives can be combined to reconstruct the missing data.


== History ==
Given the diagram below, where each column is a disk, assume A1 = 00000111, A2 = 00000101, and A3 = 0000000. Ap, generated by XORing A1, A2, and A3, will then equal 00000010. If the second drive fails, A2 will no longer be accessible, but can be reconstructed by XORing A1, A3, and Ap:
A ''parity track'' was present on the first [[magnetic-tape data storage]] in 1951. Parity in this form, applied across multiple parallel signals, is known as a [[transverse redundancy check]]. This can be combined with parity computed over multiple bits sent on a single signal, a [[longitudinal redundancy check]]. In a parallel bus, there is one longitudinal redundancy check bit per parallel signal.


Parity was also used on at least some paper-tape ([[punched tape]]) data entry systems (which preceded magnetic-tape systems). On the systems sold by British company ICL (formerly ICT) the {{convert|1|in|mm|adj=mid|-wide}} paper tape had 8 hole positions running across it, with the 8th being for parity. 7 positions were used for the data, e.g., 7-bit ASCII. The 8th position had a hole punched in it depending on the number of data holes punched.
A1 XOR A3 XOR Ap = 00000101


== See also ==
''' [[RAID Array]]'''
* [[BIP-8]]
A1 A2 A3 Ap
* [[Parity function]]
B1 B2 Bp B3
* [[Single-event upset]]
C1 Cp C2 C3
* [[Check digit]]
Dp D1 D2 D3
* [[Thue–Morse sequence]]


==References==
Note: Data blocks are in the format A#, parity blocks Ap.
{{reflist}}


==External links==
==External links==
* [http://groups.google.com/group/comp.lang.c/msg/e65b8577d041435b?hl=en& Quick way to get the odd parity of an integer]
* [http://graphics.stanford.edu/~seander/bithacks.html Different methods of generating the parity bit, among other bit operations]
* [http://graphics.stanford.edu/~seander/bithacks.html Different methods of generating the parity bit, among other bit operations]


[[Category:Telecommunications]]
[[Category:Binary arithmetic]]
[[Category:Data transmission]]
[[Category:Error detection and correction]]
[[Category:Error detection and correction]]
[[Category:Parity (mathematics)]]
[[Category:RAID]]


[[fr:Somme de contrôle#Exemple : bit de parité]]
[[af:Pariteitsbis]]
[[ca:Bit de paritat]]
[[cs:Paritní bit]]
[[da:Paritetsbit]]
[[de:Paritätsbit]]
[[es:Bit de paridad]]
[[fr:Bit de parité]]
[[it:Bit di parità]]
[[ko:패리티 비트]]
[[he:סיבית זוגיות]]
[[nl:Pariteitsbit]]
[[ja:パリティビット]]
[[pl:Bit parzystości]]
[[pt:Paridade (telecomunicações)]]
[[ru:Бит чётности]]
[[sk:Parita (kontrolný súčet)]]
[[vi:Bit chẵn lẻ]]
[[zh:奇偶校验位]]

Latest revision as of 15:46, 26 November 2024

7 bits of data
(count of 1-bits) 8 bits including parity
even odd
0000000 0 00000000 00000001
1010001 3 10100011 10100010
1101001 4 11010010 11010011
1111111 7 11111111 11111110

A parity bit, or check bit, is a bit added to a string of binary code. Parity bits are a simple form of error detecting code. Parity bits are generally applied to the smallest units of a communication protocol, typically 8-bit octets (bytes), although they can also be applied separately to an entire message string of bits.

The parity bit ensures that the total number of 1-bits in the string is even or odd.[1] Accordingly, there are two variants of parity bits: even parity bit and odd parity bit. In the case of even parity, for a given set of bits, the bits whose value is 1 are counted. If that count is odd, the parity bit value is set to 1, making the total count of occurrences of 1s in the whole set (including the parity bit) an even number. If the count of 1s in a given set of bits is already even, the parity bit's value is 0. In the case of odd parity, the coding is reversed. For a given set of bits, if the count of bits with a value of 1 is even, the parity bit value is set to 1 making the total count of 1s in the whole set (including the parity bit) an odd number. If the count of bits with a value of 1 is odd, the count is already odd so the parity bit's value is 0. Even parity is a special case of a cyclic redundancy check (CRC), where the 1-bit CRC is generated by the polynomial x+1.

Parity

[edit]

In mathematics parity can refer to the evenness or oddness of an integer, which, when written in its binary form, can be determined just by examining only its least significant bit.

In information technology parity refers to the evenness or oddness, given any set of binary digits, of the number of those bits with value one. Because parity is determined by the state of every one of the bits, this property of parity—being dependent upon all the bits and changing its value from even to odd parity if any one bit changes—allows for its use in error detection and correction schemes.

In telecommunications the parity referred to by some protocols is for error-detection. The transmission medium is preset, at both end points, to agree on either odd parity or even parity. For each string of bits ready to transmit (data packet) the sender calculates its parity bit, zero or one, to make it conform to the agreed parity, even or odd. The receiver of that packet first checks that the parity of the packet as a whole is in accordance with the preset agreement, then, if there was a parity error in that packet, requests a retransmission of that packet.

In computer science the parity stripe or parity disk in a RAID provides error-correction. Parity bits are written at the rate of one parity bit per n bits, where n is the number of disks in the array. When a read error occurs, each bit in the error region is recalculated from its set of n bits. In this way, using one parity bit creates "redundancy" for a region from the size of one bit to the size of one disk. See § Redundant Array of Independent Disks below.

In electronics, transcoding data with parity can be very efficient, as XOR gates output what is equivalent to a check bit that creates an even parity, and XOR logic design easily scales to any number of inputs. XOR and AND structures comprise the bulk of most integrated circuitry.

Error detection

[edit]
Diagrammatic oscilloscope trace of voltage levels for a RS232 transmission of a 7 bit ASCII "K" character (4Bh = 1001011b) framed as 1 start bit, 7 data bits (least significant bit first), even parity, and 1 stop bit: 7E1.

If an odd number of bits (including the parity bit) are transmitted incorrectly, the parity bit will be incorrect, thus indicating that a parity error occurred in the transmission. The parity bit is suitable only for detecting errors; it cannot correct any errors, as there is no way to determine the particular bit that is corrupted. The data must be discarded entirely, and retransmitted from scratch. On a noisy transmission medium, successful transmission can therefore take a long time or even never occur. However, parity has the advantage that it uses only a single bit and requires only a number of XOR gates to generate. See Hamming code for an example of an error-correcting code.

Parity bit checking is used occasionally for transmitting ASCII characters, which have 7 bits, leaving the 8th bit as a parity bit.

For example, the parity bit can be computed as follows. Assume Alice and Bob are communicating and Alice wants to send Bob the simple 4-bit message 1001.

Type of bit parity Successful transmission scenario
Even parity

Alice wants to transmit: 1001 and 1011

Alice computes parity bit value:
1+0+0+1 (mod 2) = 0
1+0+1+1 (mod 2) = 1

Alice adds parity bit and sends:
10010 and 10111

Bob receives: 10010 and 10111

Bob computes parity:
1+0+0+1+0 (mod 2) = 0
1+0+1+1+1 (mod 2) = 0

Bob reports correct transmission after observing expected even result.

Odd parity

Alice wants to transmit: 1001 and 1011

Alice computes parity bit value:
1+0+0+1 (+ 1 mod 2) = 1
1+0+1+1 (+ 1 mod 2) = 0

Alice adds parity bit and sends:
10011 and 10110

Bob receives: 10011 and 10110

Bob computes overall parity:
1+0+0+1+1 (mod 2) = 1
1+0+1+1+0 (mod 2) = 1

Bob reports correct transmission after observing expected odd result.

This mechanism enables the detection of single bit errors, because if one bit gets flipped due to line noise, there will be an incorrect number of ones in the received data. In the two examples above, Bob's calculated parity value matches the parity bit in its received value, indicating there are no single bit errors. Consider the following example with a transmission error in the second bit using XOR:

Type of bit parity error Failed transmission scenario
Even parity

Error in the second bit

Alice wants to transmit: 1001

Alice computes parity bit value: 1^0^0^1 = 0

Alice adds parity bit and sends: 10010

...TRANSMISSION ERROR...

Bob receives: 11010

Bob computes overall parity: 1^1^0^1^0 = 1

Bob reports incorrect transmission after observing unexpected odd result.

Even parity

Error in the parity bit

Alice wants to transmit: 1001

Alice computes even parity value: 1^0^0^1 = 0

Alice sends: 10010

...TRANSMISSION ERROR...

Bob receives: 10011

Bob computes overall parity: 1^0^0^1^1 = 1

Bob reports incorrect transmission after observing unexpected odd result.

There is a limitation to parity schemes. A parity bit is guaranteed to detect only an odd number of bit errors. If an even number of bits have errors, the parity bit records the correct number of ones even though the data is corrupt. (See also error detection and correction.) Consider the same example as before but with an even number of corrupted bits:

Type of bit parity error Failed transmission scenario
Even parity

Two corrupted bits

Alice wants to transmit: 1001

Alice computes even parity value: 1^0^0^1 = 0

Alice sends: 10010

...TRANSMISSION ERROR...

Bob receives: 11011

Bob computes overall parity: 1^1^0^1^1 = 0

Bob reports correct transmission though actually incorrect.

Bob observes even parity, as expected, thereby failing to catch the two bit errors.

Usage

[edit]

Because of its simplicity, parity is used in many hardware applications in which an operation can be repeated in case of difficulty, or simply detecting the error is helpful. For example, the SCSI and PCI buses use parity to detect transmission errors, and many microprocessor instruction caches include parity protection. Because the Instruction cache data is just a copy of the main memory, it can be disregarded and refetched if it is found to be corrupted.

In serial data transmission, a common format is 7 data bits, an even parity bit, and one or two stop bits. That format accommodates all the 7-bit ASCII characters in an 8-bit byte. Other formats are possible; 8 bits of data plus a parity bit can convey all 8-bit byte values.

In serial communication contexts, parity is usually generated and checked by interface hardware (such as a UART) and, on reception, the result made available to a processor such as the CPU (and so too, for instance, the operating system) via a status bit in a hardware register in the interface hardware. Recovery from the error is usually done by retransmitting the data, the details of which are usually handled by software (such as the operating system I/O routines).

When the total number of transmitted bits, including the parity bit, is even, odd parity has the advantage that both all-zeros and all-ones patterns are detected as errors. If the total number of bits is odd, only one of the patterns is detected as an error, and the choice can be made based on what the more common error is expected to be.

RAID array

[edit]

Parity data is used by RAID arrays (redundant array of independent/inexpensive disks) to achieve redundancy. If a drive in the array fails, remaining data on the other drives can be combined with the parity data (using the Boolean XOR function) to reconstruct the missing data.

For example, suppose two drives in a three-drive RAID 4 array contained the following data:

Drive 1: 01101101
Drive 2: 11010100

To calculate parity data for the two drives, an XOR is performed on their data:

01101101
  XOR     11010100
10111001

The resulting parity data, 10111001, is then stored on Drive 3.

Should any of the three drives fail, the contents of the failed drive can be reconstructed on a replacement drive by subjecting the data from the remaining drives to the same XOR operation. If Drive 2 were to fail, its data could be rebuilt using the XOR results of the contents of the two remaining drives, Drive 1 and Drive 3:

Drive 1: 01101101
Drive 3: 10111001

as follows:

01101101 Drive 1
XOR 10111001 Drive 3
11010100 Reconstructed Drive 2

The result of that XOR calculation yields Drive 2's contents. 11010100 is then stored on Drive 2, fully repairing the array.

XOR logic is also equivalent to even parity (because a XOR b XOR c XOR ... may be treated as XOR(a,b,c,...), which is an n-ary operator that is true if and only if an odd number of arguments is true). So the same XOR concept above applies similarly to larger RAID arrays with parity, using any number of disks. In the case of a RAID 3 array of 12 drives, 11 drives participate in the XOR calculation shown above and yield a value that is then stored on the dedicated parity drive.

Extensions and variations on the parity bit mechanism "double," "dual," or "diagonal" parity, are used in RAID-DP.

History

[edit]

A parity track was present on the first magnetic-tape data storage in 1951. Parity in this form, applied across multiple parallel signals, is known as a transverse redundancy check. This can be combined with parity computed over multiple bits sent on a single signal, a longitudinal redundancy check. In a parallel bus, there is one longitudinal redundancy check bit per parallel signal.

Parity was also used on at least some paper-tape (punched tape) data entry systems (which preceded magnetic-tape systems). On the systems sold by British company ICL (formerly ICT) the 1-inch-wide (25 mm) paper tape had 8 hole positions running across it, with the 8th being for parity. 7 positions were used for the data, e.g., 7-bit ASCII. The 8th position had a hole punched in it depending on the number of data holes punched.

See also

[edit]

References

[edit]
  1. ^ Ziemer, RodgerE.; Tranter, William H. (17 March 2014). Principles of communication : systems, modulation, and noise (Seventh ed.). Hoboken, New Jersey. ISBN 9781118078914. OCLC 856647730.{{cite book}}: CS1 maint: location missing publisher (link)
[edit]