Sign extension: Difference between revisions
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{{Short description|Operation in computer arithmetic}} |
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| ⚫ | '''Sign extension''' |
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| ⚫ | '''Sign extension''' (sometimes abbreviated as '''sext''', particularly in [[Mnemonic (assembly language)|mnemonic]]s) is the operation, in [[computer arithmetic]], of increasing the number of [[bit]]s of a [[binary number]] while preserving the number's [[sign (mathematics)|sign (positive/negative)]] and value. This is done by appending digits to the [[most significant bit|most significant]] side of the number, following a procedure dependent on the particular [[signed number representation]] used. |
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| ⚫ | |||
For example, if six bits are used to represent the number "<code>00 1010</code>" (decimal positive 10) and the sign extends operation increases the [[Word (data type)|word length]] to 16 bits, then the new representation is simply "<code>0000 0000 0000 1010</code>". Thus, both the value and the fact that the value was positive are maintained. |
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| ⚫ | If ten bits are used to represent the value "<code>11 1111 0001</code>" (decimal negative 15) using [[two's complement]], and this is sign extended to 16 bits, the new representation is "<code>1111 1111 1111 0001</code>". Thus, by padding the left side with ones, the negative sign and the value of the original number are maintained. |
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In the [[Intel]] [[x86 instruction listings|x86 instruction set]], for example, there are two ways of doing sign extension: |
In the [[Intel]] [[x86 instruction listings|x86 instruction set]], for example, there are two ways of doing sign extension: |
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* using the instructions < |
* using the instructions <code>cbw</code>, <code>cwd</code>, <code>cwde</code>, and <code>cdq</code>: convert the byte to word, word to doubleword, word to extended doubleword, and doubleword to quadword, respectively (in the x86 context a byte has 8 bits, a word 16 bits, a doubleword and extended doubleword 32 bits, and a quadword 64 bits); |
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* using one of the sign extended moves, accomplished by the < |
* using one of the sign extended moves, accomplished by the <code>movsx</code> ("move with sign extension") family of instructions. |
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==Zero extension== |
==Zero extension== |
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A similar concept is zero extension. In a move or convert operation, zero extension refers to setting the high bits of the destination to zero, rather than setting them to a copy of the most significant bit of the source. If the source of the operation is an unsigned number, then zero extension is usually the correct way to move it to a larger field while preserving its numeric value, while sign extension is correct for signed numbers. |
A similar concept is '''zero extension''' (sometimes abbreviated as '''zext'''). In a move or convert operation, zero extension refers to setting the high bits of the destination to zero, rather than setting them to a copy of the most significant bit of the source. If the source of the operation is an unsigned number, then zero extension is usually the correct way to move it to a larger field while preserving its numeric value, while sign extension is correct for signed numbers. |
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In the x86 and x64 instruction sets, the <code>movzx</code> instruction ("move with zero extension") performs this function. For example, <code>movzx ebx, al</code> copies a byte from the <code>al</code> register to the low-order byte of <code>ebx</code> and then fills the remaining bytes of <code>ebx</code> with zeroes. |
In the x86 and x64 instruction sets, the <code>movzx</code> instruction ("move with zero extension") performs this function. For example, <code>movzx ebx, al</code> copies a byte from the <code>al</code> register to the low-order byte of <code>ebx</code> and then fills the remaining bytes of <code>ebx</code> with zeroes. |
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On x64, most instructions that write to the lower 32 bits of any of the general-purpose registers will zero the upper half of the destination register. For example, the instruction <code>mov eax, 1234</code> will clear the upper 32 bits of the <code>rax</code> register. |
On x64, most instructions that write to the '''entirety of''' lower 32 bits of any of the general-purpose registers will zero the upper half of the destination register. For example, the instruction <code>mov eax, 1234</code> will clear the upper 32 bits of the <code>rax</code>{{Efn|[[X86#64-bit|RAX - 64 bit accumulator]]}} register. |
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==See also== |
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* [[Arithmetic shift]] and [[logical shift]] |
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==References== |
==References== |
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* Mano, Morris M.; Kime, Charles R. (2004). ''Logic and Computer Design Fundamentals'' (3rd ed.), pp 453. Pearson Prentice Hall. {{ISBN|0-13-140539-X}}. |
* Mano, Morris M.; Kime, Charles R. (2004). ''Logic and Computer Design Fundamentals'' (3rd ed.), pp 453. Pearson Prentice Hall. {{ISBN|0-13-140539-X}}. |
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==Notes== |
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{{Notelist|30em}} |
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[[Category:Binary arithmetic]] |
[[Category:Binary arithmetic]] |
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[[de:Zweierkomplement#Vorzeichenerweiterung]] |
[[de:Zweierkomplement#Vorzeichenerweiterung]] |
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[[ru:Дополнительный код (представление числа)#Расширение знака]] |
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[[ru:Дополнительный_код_(представление_числа)#Расширение_знака]] |
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Latest revision as of 16:10, 3 June 2024
Sign extension (sometimes abbreviated as sext, particularly in mnemonics) is the operation, in computer arithmetic, of increasing the number of bits of a binary number while preserving the number's sign (positive/negative) and value. This is done by appending digits to the most significant side of the number, following a procedure dependent on the particular signed number representation used.
For example, if six bits are used to represent the number "00 1010" (decimal positive 10) and the sign extends operation increases the word length to 16 bits, then the new representation is simply "0000 0000 0000 1010". Thus, both the value and the fact that the value was positive are maintained.
If ten bits are used to represent the value "11 1111 0001" (decimal negative 15) using two's complement, and this is sign extended to 16 bits, the new representation is "1111 1111 1111 0001". Thus, by padding the left side with ones, the negative sign and the value of the original number are maintained.
In the Intel x86 instruction set, for example, there are two ways of doing sign extension:
- using the instructions
cbw,cwd,cwde, andcdq: convert the byte to word, word to doubleword, word to extended doubleword, and doubleword to quadword, respectively (in the x86 context a byte has 8 bits, a word 16 bits, a doubleword and extended doubleword 32 bits, and a quadword 64 bits); - using one of the sign extended moves, accomplished by the
movsx("move with sign extension") family of instructions.
Zero extension
[edit]A similar concept is zero extension (sometimes abbreviated as zext). In a move or convert operation, zero extension refers to setting the high bits of the destination to zero, rather than setting them to a copy of the most significant bit of the source. If the source of the operation is an unsigned number, then zero extension is usually the correct way to move it to a larger field while preserving its numeric value, while sign extension is correct for signed numbers.
In the x86 and x64 instruction sets, the movzx instruction ("move with zero extension") performs this function. For example, movzx ebx, al copies a byte from the al register to the low-order byte of ebx and then fills the remaining bytes of ebx with zeroes.
On x64, most instructions that write to the entirety of lower 32 bits of any of the general-purpose registers will zero the upper half of the destination register. For example, the instruction mov eax, 1234 will clear the upper 32 bits of the rax[a] register.
See also
[edit]References
[edit]- Mano, Morris M.; Kime, Charles R. (2004). Logic and Computer Design Fundamentals (3rd ed.), pp 453. Pearson Prentice Hall. ISBN 0-13-140539-X.