SYCL: Difference between revisions
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SYCL is a royalty-free, cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency inspired by [[OpenCL]] that enables code for heterogeneous processors to be written in a “single-source” style using completely standard [[C++]]. SYCL enables single-source development where [[Template (C++)|C++ template]] functions can contain both host and device code to construct complex algorithms that use [[Hardware acceleration|hardware accelerators]], and then re-use them throughout their source code on different types of data. |
SYCL is a royalty-free, cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency inspired by [[OpenCL]] that enables code for heterogeneous processors to be written in a “single-source” style using completely standard [[C++]]. SYCL enables single-source development where [[Template (C++)|C++ template]] functions can contain both host and device code to construct complex algorithms that use [[Hardware acceleration|hardware accelerators]], and then re-use them throughout their source code on different types of data. |
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While the SYCL standard started as the higher-level programming model sub-group of the [[OpenCL]] working group and was originally developed for use with [[OpenCL]] and [[Standard Portable Intermediate Representation|SPIR]], SYCL is a [[Khronos Group]] workgroup independent from the [[OpenCL]] working group since September 20, 2019 and starting with SYCL 2020, SYCL has been generalized as a more general heterogeneous framework able to target other systems. This is now possible with the concept of generic [[Backend (computing)|backend]] to target any acceleration [[Application programming interface|API]] while enabling full interoperability with the target [[Application programming interface|API]], like using existing native libraries to reach the maximum performance along simplifying the programming effort. For example, the hipSYCL implementation targets ROCm and [[CUDA]] via [[Advanced Micro Devices|AMD]]'s cross-vendor HIP. |
While the SYCL standard started as the higher-level programming model sub-group of the [[OpenCL]] working group and was originally developed for use with [[OpenCL]] and [[Standard Portable Intermediate Representation|SPIR]], SYCL is a [[Khronos Group]] workgroup independent from the [[OpenCL]] working group since September 20, 2019 and starting with SYCL 2020, SYCL has been generalized as a more general heterogeneous framework able to target other systems. This is now possible with the concept of a generic [[Backend (computing)|backend]] to target any acceleration [[Application programming interface|API]] while enabling full interoperability with the target [[Application programming interface|API]], like using existing native libraries to reach the maximum performance along simplifying the programming effort. For example, the hipSYCL implementation targets ROCm and [[CUDA]] via [[Advanced Micro Devices|AMD]]'s cross-vendor HIP. |
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==Versions== |
==Versions== |
Revision as of 10:49, 22 April 2021
This article may rely excessively on sources too closely associated with the subject, potentially preventing the article from being verifiable and neutral. (January 2019) |
Original author(s) | Khronos Group |
---|---|
Developer(s) | Khronos Group |
Initial release | March 2014 |
Stable release | 2020 revision 2
/ February 9, 2021 |
Operating system | Cross-platform |
Platform | Cross-platform |
Type | High-level programming language |
Website | www |
SYCL is a higher-level programming model to improve programming productivity on various hardware accelerators. It is a single-source domain specific embedded language (DSEL) based on pure C++17. It is a standard developed by Khronos Group, announced in March 2014.
Origin of the Name
SYCL (pronounced ‘sickle’) is a name and not an acronym. In particular, SYCL developers made clear that the name contains no reference to OpenCL.[1]
Purpose
SYCL is a royalty-free, cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency inspired by OpenCL that enables code for heterogeneous processors to be written in a “single-source” style using completely standard C++. SYCL enables single-source development where C++ template functions can contain both host and device code to construct complex algorithms that use hardware accelerators, and then re-use them throughout their source code on different types of data.
While the SYCL standard started as the higher-level programming model sub-group of the OpenCL working group and was originally developed for use with OpenCL and SPIR, SYCL is a Khronos Group workgroup independent from the OpenCL working group since September 20, 2019 and starting with SYCL 2020, SYCL has been generalized as a more general heterogeneous framework able to target other systems. This is now possible with the concept of a generic backend to target any acceleration API while enabling full interoperability with the target API, like using existing native libraries to reach the maximum performance along simplifying the programming effort. For example, the hipSYCL implementation targets ROCm and CUDA via AMD's cross-vendor HIP.
Versions
The latest version is SYCL 2020 revision 2 which was published on February 9, 2021,[2] taking into account the feedback from users and implementors on the SYCL 2020 Provisional Specification revision 1 published on June 30, 2020.[3]
The latest version for the previous SYCL 1.2.1 series is SYCL 1.2.1 revision 7 which was published on April 27, 2020 (the first version was published on December 6, 2017[4]).
SYCL was introduced at GDC in March 2014 with provisional version 1.2,[5] then the SYCL 1.2 final version was introduced at IWOCL 2015 in May 2015.[6]
SYCL 2.2 provisional was introduced at IWOCL 2016 in May 2016[7] targeting C++14 and OpenCL 2.2. But the SYCL committee preferred not to finalize this version and to move towards a more flexible SYCL specification to address the increasing diversity of current hardware accelerators, including artificial intelligence engines, which led to SYCL 2020.
Tutorials
There are a few tutorials in the ComputeCpp SYCL guides.[8]
License
The source files for building the specification, such as Makefiles and some scripts, the SYCL headers and the SYCL code samples are under the Apache 2.0 license. [9] Details of the license are at: https://www.apache.org/licenses/LICENSE-2.0.html
Comparison with other APIs
The open standards SYCL and OpenCL are similar to vendor-specific CUDA from Nvidia.
In the Khronos Group realm, OpenCL and Vulkan are the low-level non-single source API and SYCL is the high-level single-source C++ domain-specific embedded language.
By comparison, the single-source C++ domain-specific embedded language version of CUDA, which is actually named "CUDA Runtime API", is somehow similar to SYCL. But there is actually a less known non single-source version of CUDA which is called "CUDA Driver API", similar to OpenCL, and used for example by the CUDA Runtime API implementation itself.
SYCL extends the C++ AMP features relieving the programmer from explicitly transferring the data between the host and devices by using buffers and accessors, by opposition to CUDA (before the introduction of Unified Memory in CUDA 6). But starting with SYCL 2020, it is also possible to use USM instead of buffers and accessors to use a lower-level programming model similar to Unified Memory in CUDA.
SYCL is higher-level than C++ AMP and CUDA since you do not need building an explicit dependency graph between all the kernels, and provides you automatic asynchronous scheduling of the kernels with communication and computation overlap. This is all done by using the concept of accessors, without requiring any compiler support.
Unlike C++ AMP and CUDA, SYCL is a pure C++ DSEL without any C++ extension, allowing some basic CPU implementation relying on pure runtime without any specific compiler. This is very useful for debugging application or to prototype for a new architecture without having the architecture and compiler available yet.
The hipSYCL implementation adds SYCL higher-level programming to CUDA and HIP.
SYCL has many similarities to the Kokkos programming model,[10] including the use of opaque multi-dimensional array objects (SYCL buffers and Kokkos arrays), multi-dimensional ranges for parallel execution, and reductions (added in SYCL 2020). Numerous features in SYCL 2020 were added in response to feedback from the Kokkos community.
See also
References
- ^ Keryell, Ronan. "Meaning of SYCL". GitHub. Retrieved 5 February 2021.
- ^ Khronos Group (9 February 2021). "Khronos Releases SYCL 2020 Specification". Khronos. Retrieved 22 February 2021.
- ^ Khronos Group (30 June 2020). "Khronos Steps Towards Widespread Deployment of SYCL with Release of SYCL 2020 Provisional Specification". Khronos. Retrieved 4 December 2020.
- ^ Khronos Group (6 December 2017). "The Khronos Group Releases Finalized SYCL 1.2.1". Khronos. Retrieved 12 December 2017.
- ^ Khronos Group (19 March 2014). "Khronos Releases SYCL 1.2 Provisional Specification". Khronos. Retrieved 20 August 2017.
- ^ Khronos Group (11 May 2015). "Khronos Releases SYCL 1.2 Final Specification". Khronos. Retrieved 20 August 2017.
- ^ Khronos Group (18 April 2016). "Khronos Releases OpenCL 2.2 Provisional Specification with OpenCL C++ Kernel Language". Khronos. Retrieved 18 September 2017.
- ^ "Introduction to GPGPU programming with SYCL". Codeplay. Retrieved 3 October 2017.
- ^ https://github.com/KhronosGroup/SYCL-Docs/blob/SYCL-1.2.1/master/LICENSE.txt.
{{cite web}}
: Missing or empty|title=
(help) - ^ Hammond, Jeff R.; Kinsner, Michael; Brodman, James (2019). "A comparative analysis of Kokkos and SYCL as heterogeneous, parallel programming models for C++ applications". Proceedings of the International Workshop on OpenCL: 1–2. doi:10.1145/3318170.3318193.
External links
- Khronos SYCL webpage
- The SYCL specifications in Khronos registry
- C++17 ParallelSTL in SYCL
- SYCL tech resources
- Codeplay ComputeCpp SYCL implementation
- Implementation of SYCL started by Intel with the goal of Clang/LLVM up-streaming
- hipSYCL: implementation of SYCL 1.2.1 over AMD HIP/NVIDIA CUDA
- triSYCL open-source SYCL implementation
- SYCL Conference @ IWOCL
- "SYCL 2020 Launches with New Name, New Features, and High Ambition", HPCWire article (2021 Feb. 9th)