Template:Infobox CPU: Difference between revisions
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}}{{#invoke:Check for unknown parameters|check|unknown={{main other|[[Category:Pages using infobox CPU with unknown parameters|_VALUE_]]}}|preview=Page using [[Template:Infobox CPU]] with unknown parameter "_VALUE_"|ignoreblank=y| address-width | alt | application | arch | brand1 | brand2 | brand3 | brand4 | brand5 | brand6 | brand7 | brand8 | brand9 | caption | clock | co-processor | code | core1 | core2 | core3 | core4 | core5 | core6 | core7 | core8 | core9 | core10 | core11 | core12 | core13 | core14 | core15 | core16 | core17 | core18 | core19 | core20 | core21 | core22 | core23 | core24 | core25 | core26 | core27 | core28 | core29 | core30 | core31 | core32 | core33 | core34 | core35 | core36 | core37 | core38 | core39 | core40 | cores | cores1 | cores2 | cores3 | cores4 | cores5 | cpuid | created | data-width | designfirm | dmi-fast-unit | dmi-fastest | dmi-slow-unit | dmi-slowest | extensions | extensions1 | extensions2 | extensions3 | fast-unit | fastest | fsb | fsb-fast-unit | fsb-fastest | fsb-slow-unit | fsb-slowest | gpu | hypertransport-fast-unit | hypertransport-fastest | hypertransport-slow-unit | hypertransport-slowest | image | image_size | instructions | l1cache | l2cache | l3cache | l4cache | llcache | launching | manuf1 | manuf2 | manuf3 | manuf4 | manuf5 | manuf6 | manuf7 | manuf8 | manuf9 | manuf10 | microarch | model | model1 | model2 | model3 | model4 | model5 | model6 | model7 | model8 | model9 | name | numcores | numinstructions | pack1 | pack2 | pack3 | pack4 | pack5 | pcode1 | pcode2 | pcode3 | pcode4 | pcode5 | pcode6 | pcode7 | pcode8 | pcode9 | predecessor | produced-end | produced-start | qpi-fast-unit | qpi-fastest | qpi-slow-unit | qpi-slowest | size-from | size-to | slow-unit | slowest | sock1 | sock2 | sock3 | sock4 | sock5 | sock6 | sock7 | sock8 | sock9 | socket | soldby | successor | support status | support_status | transistors | transistors1 | transistors2 | transistors3 | transistors4 | transistors5 | transistors6 | transistors7 | transistors8 | variant | variant1 | variant2 | variant3 | variant4 | variant5 | variant6 | variant7 | variant8 | variant9 | virtual-width }}<noinclude> |
}}{{#invoke:Check for unknown parameters|check|unknown={{main other|[[Category:Pages using infobox CPU with unknown parameters|_VALUE_]]}}|preview=Page using [[Template:Infobox CPU]] with unknown parameter "_VALUE_"|ignoreblank=y| address-width | alt | application | arch | brand1 | brand2 | brand3 | brand4 | brand5 | brand6 | brand7 | brand8 | brand9 | caption | clock | co-processor | code | core1 | core2 | core3 | core4 | core5 | core6 | core7 | core8 | core9 | core10 | core11 | core12 | core13 | core14 | core15 | core16 | core17 | core18 | core19 | core20 | core21 | core22 | core23 | core24 | core25 | core26 | core27 | core28 | core29 | core30 | core31 | core32 | core33 | core34 | core35 | core36 | core37 | core38 | core39 | core40 | cores | cores1 | cores2 | cores3 | cores4 | cores5 | cpuid | created | data-width | designfirm | dmi-fast-unit | dmi-fastest | dmi-slow-unit | dmi-slowest | extensions | extensions1 | extensions2 | extensions3 | fast-unit | fastest | fsb | fsb-fast-unit | fsb-fastest | fsb-slow-unit | fsb-slowest | gpu | hypertransport-fast-unit | hypertransport-fastest | hypertransport-slow-unit | hypertransport-slowest | image | image_size | instructions | l1cache | l2cache | l3cache | l4cache | llcache | launching | manuf1 | manuf2 | manuf3 | manuf4 | manuf5 | manuf6 | manuf7 | manuf8 | manuf9 | manuf10 | microarch | model | model1 | model2 | model3 | model4 | model5 | model6 | model7 | model8 | model9 | name | numcores | numinstructions | pack1 | pack2 | pack3 | pack4 | pack5 | codename1 | codename2 | codename3 | codename4 | codename5 | codename6 | codename7 | codename8 | codename9 | pcode1 | pcode2 | pcode3 | pcode4 | pcode5 | pcode6 | pcode7 | pcode8 | pcode9 | predecessor | produced-end | produced-start | qpi-fast-unit | qpi-fastest | qpi-slow-unit | qpi-slowest | size-from | size-to | slow-unit | slowest | sock1 | sock2 | sock3 | sock4 | sock5 | sock6 | sock7 | sock8 | sock9 | socket | soldby | successor | support status | support_status | transistors | transistors1 | transistors2 | transistors3 | transistors4 | transistors5 | transistors6 | transistors7 | transistors8 | variant | variant1 | variant2 | variant3 | variant4 | variant5 | variant6 | variant7 | variant8 | variant9 | virtual-width }}<noinclude> |
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{{documentation}}<!-- place category and language links on the /doc sub-page, not here --> |
{{documentation}}<!-- place category and language links on the /doc sub-page, not here --> |
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</noinclude> |
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Revision as of 12:00, 13 April 2023
This template uses Lua: |
This template is for CPUs, SoCs and SiPs. For generic hardware components, see Template:Infobox computer hardware.
This article is missing information about one good example of this infobox would be nice here. But as long as three architecture-parameters and the four name-parameters are not clearly defined it is difficult. (October 2019) |
[[File:{{{image}}}|{{{image_size}}}|alt={{{alt}}}]] | |
General information | |
---|---|
Launching | {{{launching}}} |
Launched | {{{produced-start}}} |
Discontinued | {{{produced-end}}} |
Marketed by | {{{soldby}}} |
Designed by | {{{designfirm}}} |
Common manufacturer(s) |
|
CPUID code | {{{cpuid}}} |
Product code | {{{code}}} |
Performance | |
Max. CPU clock rate | {{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}} |
FSB speeds | {{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}} |
HyperTransport speeds | {{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}} |
QPI speeds | {{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}} |
DMI speeds | {{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}} |
Data width | {{{data-width}}} |
Address width | {{{address-width}}} |
Virtual address width | {{{virtual-width}}} |
Cache | |
L1 cache | {{{l1cache}}} |
L2 cache | {{{l2cache}}} |
L3 cache | {{{l3cache}}} |
L4 cache | {{{l4cache}}} |
Last level cache | {{{llcache}}} |
Architecture and classification | |
Application | {{{application}}} |
Technology node | {{{size-from}}} to {{{size-to}}} |
Microarchitecture | {{{microarch}}} |
Instruction set | {{{arch}}} |
Instructions | {{{instructions}}} |
Extensions |
|
Number of instructions | {{{numinstructions}}} |
Physical specifications | |
Transistors |
|
Cores |
|
GPU(s) | {{{gpu}}} |
Co-processor | {{{co-processor}}} |
Package(s) |
|
Socket(s) |
|
Products, models, variants | |
Core name(s) |
|
Product code name(s) |
|
Model(s) |
|
Brand name(s) |
|
Variant(s) |
|
History | |
Predecessor | {{{predecessor}}} |
Successor | {{{successor}}} |
Support status | |
{{{support status}}} |
{{Infobox CPU
| name =
| hide_subheadings =
| image =
| image_size =
| alt =
| caption =
<!----------------- General Info ----------------->
| launching =
| produced-start =
| produced-end =
| soldby =
| designfirm =
| manuf1 = <!-- manuf1..10 -->
| cpuid =
| code =
<!----------------- Performance ------------------>
| slowest =
| fastest =
| slow-unit =
| fast-unit =
| fsb-slowest =
| fsb-fastest =
| fsb-slow-unit =
| fsb-fast-unit =
| hypertransport-slowest =
| hypertransport-fastest =
| hypertransport-slow-unit =
| hypertransport-fast-unit =
| qpi-slowest =
| qpi-fastest =
| qpi-slow-unit =
| qpi-fast-unit =
| dmi-slowest =
| dmi-fastest =
| dmi-slow-unit =
| dmi-fast-unit =
| data-width =
| address-width =
| virtual-width =
<!-------------------- Cache --------------------->
| l1cache =
| l2cache =
| l3cache =
| l4cache =
| llcache =
<!------- Architecture and classification -------->
| application =
| size-from =
| size-to =
| microarch =
| arch =
| instructions =
| extensions =
| numinstructions =
<!----------- Physical specifications ------------>
| transistors =
| numcores =
| amountmemory =
| gpu =
| co-processor =
| pack1 = <!-- pack1..9 -->
| sock1 = <!-- sock1..9 -->
<!--------- Products, models, variants ----------->
| core1 = <!-- core1..9 -->
| pcode1 = <!-- pcode1..9 -->
| model1 = <!-- model1..9 -->
| brand1 = <!-- brand1..9 -->
| variant =
<!------------------ History ------------------->
| predecessor =
| successor =
<!------------------ Support status ------------------->
| support status =
}}
Usage
{{Infobox CPU
| name = <!-- Device Name -->
| hide_subheadings = <!-- Any value here will hide the subheadings -->
| image = <!-- An image to show in the infobox -->
| image_size = <!-- Size of the image (defaults to 200px) -->
| alt = <!-- Mouse over text for the image -->
| caption = <!-- A caption for the image -->
<!----------------- General Info ------------------------------------------------------------------------------------->
| launching = <!-- Use if a CPU microarchitecture/series has not yet launched but its official release date is known -->
| produced-start = <!-- When production began / Launch date →see talkpage section #Dates -->
| produced-end = <!-- When production ended / Discontinued date →see talkpage section #Dates -->
| soldby = <!-- Often, but not always, the same as the designfirm and/or manuf1 -->
| designfirm = <!-- Often, but not always, the same as manuf1 and/or soldby -->
| manuf1 = <!-- (1..10) Common manufacturers of the device -->
| cpuid = <!-- CPUID or PVR value -->
| code = <!-- numerical identifier for the CPU (product code) -->
<!----------------- Performance -------------------------------------------------------------------------------------->
| slowest = <!-- Lowest maximum CPU clock -->
| fastest = <!-- Highest maximum CPU clock -->
| slow-unit = <!-- Unit for slow speed. Default: GHz -->
| fast-unit = <!-- Unit for fast speed. Default: GHz -->
| fsb-slowest = <!-- Slowest FSB speed -->
| fsb-fastest = <!-- Fastest FSB speed -->
| fsb-slow-unit = <!-- Unit for slow speed. Default: MHz -->
| fsb-fast-unit = <!-- Unit for fast speed. Default: MHz -->
| hypertransport-slowest = <!-- Slowest HyperTransport speed -->
| hypertransport-fastest = <!-- Fastest HyperTransport speed -->
| hypertransport-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| hypertransport-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| qpi-slowest = <!-- Slowest QPI (QuickPath Interconnect) speed -->
| qpi-fastest = <!-- Fastest QPI speed -->
| qpi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| qpi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| dmi-slowest = <!-- Slowest DMI (Direct Media Interface) speed -->
| dmi-fastest = <!-- Fastest DMI speed -->
| dmi-slow-unit = <!-- Unit for slow speed. Default: GT/s -->
| dmi-fast-unit = <!-- Unit for fast speed. Default: GT/s -->
| data-width = <!-- Data bus width in bits -->
| address-width = <!-- Address bus width in bits -->
| virtual-width = <!-- Virtual address bus width in bits -->
<!-------------------- Cache ----------------------------------------------------------------------------------------->
| l1cache = <!-- Level 1 cache size -->
| l2cache = <!-- Level 2 cache size -->
| l3cache = <!-- Level 3 cache size -->
| l4cache = <!-- Level 4 cache size -->
| llcache = <!-- Last Level cache size -->
<!------- Architecture and classification ---------------------------------------------------------------------------->
| application = <!-- Typical application (Embedded, Mobile, Desktop, Server) -->
| size-from = <!-- First fabrication size -->
| size-to = <!-- Second fabrication size -->
| microarch = <!-- Microarchitecture of the CPU -->
| arch = <!-- Instruction set architecture (ISA) that the CPU implements →see talkpage section #Architecture -->
| instructions = <!-- Instruction sets →see talkpage section #Architecture -->
| extensions = <!-- Extensions to the instructions -->
| numinstructions = <!-- Number of instructions -->
<!----------- Physical specifications -------------------------------------------------------------------------------->
| transistors = <!-- Number of transistors, transistor count -->
| numcores = <!-- Number of cores (2 for dual-core) -->
| amountmemory = <!-- Amount of system RAM for SoC or SiP -->
| gpu = <!-- Integrated GPU -->
| co-processor = <!-- A [[co-processor]](s) used together -->
| pack1 = <!-- (1..5) Names of CPU packages -->
| sock1 = <!-- (1..9) Names of the sockets that the CPU was made for -->
<!--------- Products, models, variants ------------------------------------------------------------------------------->
| core1 = <!-- (1..9) Names of the cores →see talkpage section "Names (Products, models, variants)" -->
| pcode1 = <!-- (1..9) Product code names →see talkpage section "Names (Products, models, variants)" -->
| model1 = <!-- (1..9) Model names →see talkpage section "Names (Products, models, variants)" -->
| brand1 = <!-- (1..9) Marketing names of the CPU -->
| variant = <!-- Variants in the same family and generation →see talkpage section "Names (Products, models, variants)" -->
<!------------------ History --------------------------------------------------------------------------------------->
| predecessor = <!-- What CPU came before -->
| successor = <!-- What CPU came after -->
<!------------------ Support status --------------------------------------------------------------------------------->
| support status = <!-- Current support status -->
}}
- All fields, except
name
are optional - The following parameters are deprecated:
created
→better: produced-start
,produced-end
clock
→better: slowest
,fastest
fsb
→better: fsb-slowest
,fsb-fastest
cores
,cores1
→better: numcores
socket
→better: sock1
...sock9
manuf
,core
,sock
,pack
,arch
, andmicroarch
are AutoLinks, so you can use plain text or a link for them.- The numbered attributes mean that there is allowance for multiples.
- See the talk page for some examples which show the full usage of this infobox in a few combinations.