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{{User sandbox}}
{{User sandbox}}
{{mw-datatable}}
<table class="wikitable" style="border:none; text-align:center;">
{| class="wikitable mw-collapsible collapsible floatleft mw-datatable" style="margin:0.5em auto; text-align:center; min-width:80em;"
<tr>
|+Atom roadmap<ref name="atom-ticktock">{{cite web|title=Intel's Silvermont Architecture Revealed: Getting Serious About Mobile|url=http://www.anandtech.com/show/6936/intels-silvermont-architecture-revealed-getting-serious-about-mobile|website=[[AnandTech]]}}</ref>
<th colspan="2">[[Intel Atom|Atom (ULV)]]</th>
|-
<td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
<th rowspan="2">Node name</th>
! rowspan="2" | Fabri-<br />cation<br />process
! rowspan="2" | Micro-<br />archi-<br />tecture
<td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
! rowspan="2" | Release<br />date
<th colspan="2">[[Pentium]]/[[Intel Core|Core]]</th>
! colspan="8" | Processors/SoCs
<td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
|-
<td colspan="5" rowspan="7" style="border:none; background-color:var(--background-color-base);"></td>
! <abbr title="Mobile Internet device">MID</abbr>, smartphone
</tr>
! Tablet
<tr>
! Netbook
<th>[[Microarchitecture|Microarch.]]</th>
! Nettop
<th>Step</th>
! Embedded
<th>[[Microarchitecture|Microarch.]]</th>
! Server
<th>Step</th>
! Communication
</tr>
! <abbr title="Consumer Electronics">CE</abbr>
<tr>
|-
<td colspan="2" rowspan="13"></td>
<th>[[600 nm process|600 nm]]</th>
| rowspan="2" | [[45 nanometer|45 nm]]
<td rowspan="8"><b>[[P6 (microarchitecture)|P6]]</b></td>
| rowspan="2" | [[Bonnell (microarchitecture)|Bonnell]]
| <!-- April -->2008
<td>[[Pentium Pro]]<br>(133 MHz)</td>
| [[Silverthorne (microprocessor)|Silverthorne]]<!-- Menlow -->
</tr>
| {{n/a}}
<tr>
| colspan="2" | [[Diamondville (microprocessor)|Diamondville]]
<th>[[600 nm process|500 nm]]</th>
| rowspan="2" | [[Tunnel Creek (microprocessor)|Tunnel Creek]],<br/>Stellarton
<td>[[Pentium Pro]]<br>(150 MHz)</td>
| rowspan="2" {{N/A}}
</tr>
| rowspan="2" {{unk}}
<tr>
| [[Sodaville (SoC)|Sodaville]]
<th rowspan="2">[[350 nm process|350 nm]]</th>
|-
<td>[[Pentium Pro]]<br>(166–200 MHz)</td>
| 2010
</tr>
| colspan="2" | [[Lincroft (microprocessor)|Lincroft]]<!-- Moorestown --><!-- Oak Trail -->
<tr>
<td>[[Klamath (microprocessor)|Klamath]]</td>
| colspan="2" | [[Pineview (microprocessor)|Pineview]]
| [[Groveland (SoC)|Groveland]]
</tr>
|-
<tr>
| [[32 nanometer|32 nm]]
<th rowspan="2">[[250 nm process|250 nm]]</th>
| [[Saltwell (microarchitecture)|Saltwell]]
<td>[[Deschutes (microprocessor)|Deschutes]]</td>
| <!-- November -->2011
</tr>
| Medfield ([[Penwell (SoC)|Penwell]] & Lexington),<br />Clover Trail+ (Cloverview) <!-- Clover Trail+ smartphones, see for example http://newsroom.intel.com/community/intel_newsroom/blog/2013/02/24/intel-accelerates-mobile-computing-push or http://www.tomshardware.com/reviews/atom-z2580-clover-trail-medfield,3446.html -->
<tr>
| Clover Trail ([[Cloverview (SoC)|Cloverview]]) <!-- Penwell is used in some tablets, see for example http://www.intel.com/content/www/us/en/education-solutions/tablets.html -->
<td>[[Katmai (microprocessor)|Katmai]]</td>
| colspan="2" | Cedar Trail ([[Cedarview (microprocessor)|Cedarview]])
<th>[[NetBurst]]</th>
| {{unk}}
<td colspan="4" rowspan="3" style="border:none; background-color:var(--background-color-base);"></td>
| [[Centerton (SoC)|Centerton]] & Briarwood
</tr>
| {{unk}}
<tr>
| [[Berryville (SoC)|Berryville]]
<th>[[180 nm process|180 nm]]</th>
|-
<td>[[Coppermine (microprocessor)|Coppermine]]</td>
| [[22 nanometer|22 nm]]
<td>[[Pentium 4#Willamette|Willamette]]</td>
| [[Silvermont]]
</tr>
| 2013
<tr>
| Merrifield (Tangier),<ref>{{cite web |last=Hiroshige |first=Goto |title=Intel Products for Tablets & SmartPhones |work=標準 |publisher=Impress |url=http://pc.watch.impress.co.jp/video/pcw/docs/569/575/p2.pdf |url-status=dead |archive-url=https://web.archive.org/web/20131114063059/http://pc.watch.impress.co.jp/video/pcw/docs/569/575/p2.pdf |archive-date=2013-11-14 }}</ref> Slayton,<br />Moorefield (Anniedale)<ref>{{cite web |title=Import Data and Price of anniedale |url=https://www.zauba.com/import-anniedale-hs-code.html |access-date=2015-09-23 |archive-url=https://web.archive.org/web/20150517225042/https://www.zauba.com/import-anniedale-hs-code.html |archive-date=2015-05-17 |url-status=dead }}</ref>
<th rowspan="2">[[130 nm process|130 nm]]</th>
| Bay Trail-T<br />(Valleyview)
<td>[[Tualatin (microprocessor)|Tualatin]]</td>
| Bay Trail-M<br />(Valleyview)
<td rowspan="2">[[Pentium 4#Northwood|Northwood]]</td>
| Bay Trail-D<br />(Valleyview)
</tr>
| Bay Trail-I<br />(Valleyview)
<tr>
| Avoton
<td rowspan="4">'''Pentium M'''</td>
| Rangeley
<td>[[Banias (microprocessor)|Banias]]</td>
| {{unk}}
<td style="border:none; background-color:var(--background-color-base);"></td>
|-
<th>[[Hyper-threading|NetBurst(HT)]]</th>
| rowspan="3" | [[14 nanometer|{{0}}14 nm]]<ref name="atom-ticktock" />
<td style="border:none; background-color:var(--background-color-base);"></td>
| [[Airmont (microarchitecture)|Airmont]]
<th>NetBurst([[Multi-core processor|×2]])</th>
| 2014
</tr>
| Binghamton & Riverton
<tr>
| Cherry Trail-T (Cherryview)<ref>{{cite web |title=アウトオブオーダーと最新プロセスを採用する今後のAtom |date=30 November 2012|url=http://pc.watch.impress.co.jp/docs/column/ubiq/20121130_576105.html}}</ref>
<th rowspan="2">[[90 nm process|90 nm]]</th>
| colspan="3" | Braswell<ref>{{cite web|title=Products (Formerly Braswell)|url=http://ark.intel.com/products/codename/66094/Braswell#@All|website=Intel ARK (Product Specs)|access-date=5 April 2016}}</ref>
<td rowspan="2">[[Dothan (microprocessor)|Dothan]]</td>
| Denverton {{Cancelled}}
<td>[[Pentium 4#Prescott|Prescott]]</td>
| {{unk}}
<td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
| {{unk}}
<td>[[Pentium 4#Prescott 2M (Extreme Edition)|Prescott‑2M]]</td>
|-
<td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
| [[Goldmont]]<br /><ref>{{cite news|last1=Smith|first1=Ryan|last2=Cutress|first2=Ian|title=Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Canceled|url=http://www.anandtech.com/show/10288/intel-broxton-sofia-smartphone-socs-cancelled|access-date=29 June 2016|publisher=Anandtech.com|date=29 April 2016}}</ref>
<td>[[Smithfield (microprocessor)|Smithfield]]</td>
| 2016
</tr>
| Broxton {{Cancelled}}
<tr>
| Willow Trail {{Cancelled}}<br />Apollo Lake
<td><s>[[Tejas and Jayhawk|Tejas]]</s></td>
| colspan="3" | [[Apollo Lake]]<ref>{{cite web|title=Products (Formerly Apollo Lake)|url=http://ark.intel.com/products/codename/80644/Apollo-Lake|website=Intel ARK (Product Specs)|access-date=6 January 2016}}</ref>
<td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">→</td>
| Denverton<ref>{{cite web|title=Products (Formerly Denverton)|url=https://ark.intel.com/products/codename/63508/Denverton|website=Intel ARK (Product Specs)|access-date=6 January 2016}}</ref>
<td>⇩</td>
| {{unk}}
<td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">→</td>
| {{unk}}
<td><s>[[Tejas and Jayhawk#Design and microarchitecture|Cedarmill (Tejas)]]</s></td>
|-
</tr>
| [[Goldmont Plus|Goldmont<br />Plus]]<ref>{{cite web|url=https://www.anandtech.com/show/12146/intel-launches-gemini-lake-pentium-silver-and-celeron-socs-new-cpu-media-features|title=Intel Launches New Pentium Silver and Celeron Atom Processors: Gemini Lake is Here|first=Anton|last=Shilov|date=December 12, 2017|website=[[AnandTech]]}}</ref>
<tr>
| 2017
<th rowspan="2">[[65 nm process|65 nm]]</th>
| {{unk}}
<td>[[Yonah (microprocessor)|Yonah]]</td>
| {{unk}}
<td><s>[[NetBurst#Successor|Nehalem (NetBurst)]]</s></td>
| colspan="3" | [[Gemini Lake]]<ref>{{cite web|title=Products (Formerly Gemini Lake)|url=https://ark.intel.com/products/codename/83915/Gemini-Lake|website=Intel ARK (Product Specs)|access-date=11 December 2017}}</ref><br />[[Gemini Lake|Gemini Lake Refresh]]<ref>{{cite web|title=Products (Formerly Gemini Lake Refresh)|url=https://ark.intel.com/content/www/us/en/ark/products/codename/197862/gemini-lake-refresh.html|website=Intel ARK (Product Specs)|access-date=4 November 2019}}</ref>
<td style="border:none; background-color:var(--background-color-base);"></td>
| {{unk}}
<td>[[Pentium 4#Cedar Mill|Cedar Mill]]</td>
| {{unk}}
<td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
| {{unk}}
<td>[[Presler (microprocessor)|Presler]]</td>
|-
</tr>
| [[10 nm process|10 nm]]
<tr>
| [[Tremont (microarchitecture)|Tremont]]<ref name="the-tremont-core">{{cite web|url=https://www.anandtech.com/show/15009/intels-new-atom-microarchitecture-the-tremont-core|title=Intel's new Atom Microarchitecture: The Tremont Core in Lakefield|last=Cutress|first=Dr Ian|website=[[AnandTech]]|access-date=2019-11-17}}</ref>
<td rowspan="2"><b>Core</b></td>
| 2020
<td>[[Intel Core (microarchitecture)|Merom]]</td>
| {{unk}}
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">4 cores on mainstream desktop, [[DDR3]] introduced</td>
| Lakefield (hybrid)
</tr>
| colspan="3" | Lakefield (hybrid)<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/codename/81657/lakefield.html|title=Products formerly Lakefield|website=Intel ARK (Product Specs)}}</ref><br> Elkhart Lake<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/codename/128825/elkhart-lake.html|title=Products formerly Elkhart Lake|website=Intel ARK (Product Specs)}}</ref><br />Jasper Lake<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/codename/128823/jasper-lake.html|title = Products formerly Jasper Lake}}</ref>
<tr>
| Jacobsville<br />Parker Ridge<ref>{{cite web | url=https://ark.intel.com/content/www/us/en/ark/products/codename/229610/products-formerly-parker-ridge.html | title=Products formerly Parker Ridge }}</ref><br />Snow Ridge<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/codename/87586/snow-ridge.html|title=Products formerly Snow Ridge|website=Intel ARK (Product Specs)}}</ref>
<td rowspan="4"><b>Bonnell</b></td>
| {{unk}}
<td rowspan="2">[[Bonnell (microarchitecture)|Bonnell]]</td>
| {{unk}}
<th rowspan="2">[[45 nm process|45 nm]]</th>
|-
<td>[[Penryn (microarchitecture)|Penryn]]</td>
| [[7 nm process|Intel 7]]
<td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
| [[Gracemont (microarchitecture)|Gracemont]]<ref>{{cite web|url=https://www.anandtech.com/show/16881/a-deep-dive-into-intels-alder-lake-microarchitectures/4|title = Intel Architecture Day 2021: Alder Lake, Golden Cove, and Gracemont Detailed}}</ref>
</tr>
| 2021
<tr>
| {{unk}}
<td rowspan="2"><b>Nehalem</b></td>
| {{unk}}
<td>[[Nehalem (microarchitecture)|Nehalem]]</td>
| colspan="3" | [[Alder Lake]] (hybrid)<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/codename/147470/alder-lake.html|title=Products formerly Alder Lake|website=Intel ARK (Product Specs)}}</ref><br />[[Raptor Lake]] (hybrid)<br />Alder Lake-N<ref>{{cite web | url=https://www.intel.com/content/www/us/en/newsroom/news/welcome-the-new-intel-processor.html | title=Intel Introduces New Intel Processor for Upcoming Essential Segment }}</ref><ref>{{cite web | url=https://ark.intel.com/content/www/us/en/ark/products/codename/232598/products-formerly-alder-laken.html | title=Products formerly Alder Lake-N }}</ref>
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">[[Hyper-threading|HT]] reintroduced, integrated [[Memory controller|MC]], PCH<br>L3-cache introduced, 256KB L2-cache/core</td>
| {{unk}}
</tr>
| {{unk}}
<tr>
| {{unk}}
<td rowspan="2">[[Saltwell (microarchitecture)|Saltwell]]</td>
|-
<th rowspan="2">[[32 nm process|32 nm]]</th>
| [[5 nm process#4 nm process nodes|Intel 4]]
<td>[[Westmere (microarchitecture)|Westmere]]</td>
| rowspan="3" | [[Crestmont (microarchitecture)|Crestmont]]
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Introduced GPU on same package and [[AES-NI|AES-NI]]</td>
| rowspan=2 | 2023
</tr>
| {{unk}}
<tr>
| {{unk}}
<td rowspan="2"><b>Sandy Bridge</b></td>
| rowspan=2 colspan="3" | [[Meteor Lake]] (hybrid)
<td>[[Sandy Bridge]]</td>
| Grand Ridge
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">On-die ring bus, no more non-[[UEFI]] motherboards</td>
| {{unk}}
</tr>
| {{unk}}
<tr>
|-
<td rowspan="4"><b>Silvermont</b></td>
| TSMC N6
<td rowspan="2">[[Silvermont]]</td>
| {{unk}}
<th rowspan="2">[[22 nm process|22 nm]]</th>
| {{unk}}
<td>[[Ivy Bridge (microarchitecture)|Ivy Bridge]]</td>
| {{unk}}
<td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
| {{unk}}
</tr>
| {{unk}}
<tr>
|-
<td rowspan="2"><b>Haswell</b></td>
| [[3 nm process|Intel 3]]
<td>[[Haswell (microarchitecture)|Haswell]]</td>
| 2024
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Fully integrated voltage regulator</td>
| {{unk}}
</tr>
| {{unk}}
<tr>
| {{unk}}
<td rowspan="2">[[Airmont (microarchitecture)|Airmont]]</td>
| {{unk}}
<th rowspan="9">[[14 nm process|14 nm]]</th>
| {{unk}}
<td>[[Broadwell (microarchitecture)|Broadwell]]</td>
| [[Sierra Forest]]
<td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
| {{unk}}
</tr>
| {{unk}}
<tr>
|-
<td rowspan="7"><b>Skylake</b></td>
| rowspan="2" | {{nobr|TSMC N3B}}
<td>[[Skylake (microarchitecture)|Skylake]]</td>
| rowspan="2" |[[Skymont]]
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">[[DDR4]] introduced on mainstream desktop</td>
| rowspan="2" |2024
</tr>
| {{unk}}
<tr>
| {{unk}}
<td rowspan="3"><b>Goldmont</b></td>
| colspan="3" |[[Lunar Lake]] (hybrid)
<td rowspan="3">[[Goldmont]]</td>
| {{unk}}
<td>[[Kaby Lake]]</td>
| {{unk}}
<td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
| {{unk}}
</tr>
|-
<tr>
| {{unk}}
<td>[[Coffee Lake]]</td>
| {{unk}}
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">6 cores on mainstream desktop</td>
| colspan="3" | [[Arrow Lake (microprocessor)|Arrow Lake]] (hybrid)
</tr>
| {{unk}}
<tr>
| {{unk}}
<td>[[Kaby Lake#Amber Lake|Amber Lake]]</td>
| {{unk}}
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
|-
</tr>
| [[1.8 nm process|Intel 18A]]
<tr>
| [[Darkmont]]
<td rowspan="4"><b>Goldmont Plus</b></td>
| 2025
<td rowspan="4">[[Goldmont Plus]]</td>
| {{unk}}
<td>[[Whiskey Lake]]</td>
| {{unk}}
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
| {{unk}}
</tr>
| {{unk}}
<tr>
| {{unk}}
<td>[[Coffee Lake]] Refresh</td>
| [[Clearwater Forest]]
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">8 cores on mainstream desktop</td>
| {{unk}}
</tr>
| {{unk}}
<tr>
|}
<td>[[Comet Lake (microprocessor)|Comet Lake]]</td>
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">10 cores on mainstream desktop</td>
</tr>
<tr>
<td><b>Sunny Cove</b></td>
<td>[[Sunny_Cove_(microarchitecture)#Cypress_Cove|Cypress Cove]] ([[Rocket Lake]])</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Backported Sunny Cove microarchitecture for 14nm</td>
</tr>
<tr>
<td rowspan="3"><b>Tremont</b></td>
<td rowspan="3">[[Tremont (microarchitecture)|Tremont]]</td>
<th rowspan="3">[[10 nm process|10 nm]]</th>
<td>'''Skylake'''</td>
<td>Palm Cove ([[Cannon Lake (microarchitecture)|Cannon Lake]])</td>
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
</tr>
<tr>
<td rowspan="2"><b>Sunny Cove</b></td>
<td>[[Sunny Cove]] ([[Ice Lake (microprocessor)|Ice Lake]])</td>
<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">512 KB L2-cache/core</td>
</tr>
<tr>
<td>[[Willow Cove]] ([[Tiger Lake]])</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">[[Intel Xe|X<sup>e</sup>]] graphics engine</td>
</tr>
<tr>
<td rowspan="2"><b>Gracemont</b></td>
<td rowspan="2">[[Gracemont (microarchitecture)|Gracemont]]</td>
<th rowspan="2">[[7 nm process|Intel 7]]<br>(10nm ESF)</th>
<td rowspan="2"><b>Golden Cove</b></td>
<td>[[Golden Cove]] ([[Alder Lake]])</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Hybrid, DDR5, PCIe 5.0</td>
</tr>
<tr>
<td>[[Golden Cove#Raptor Cove|Raptor Cove]] ([[Raptor Lake]])</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
</tr>
<tr>
<td><b>Crestmont</b></td>
<td>Crestmont</td>
<th>[[5 nm process|Intel 4]]</th>
<td><b>Redwood Cove</b></td>
<td>[[Meteor Lake]]</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Mobile-only<br>[[Neural processing unit|NPU]], [[chiplet]] architecture</td>
</tr>
<tr>
<td rowspan="2"><b>Skymont</b></td>
<td rowspan="2">[[Skymont]]</td>
<th rowspan="2">[[3 nm process|N3B]] ([[TSMC]])</th>
<td rowspan="2"><b>Lion Cove</b></td>
<td>[[Lunar Lake]]</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Low power mobile only (9-30W) </td>
</tr>
<tr>
<td>[[Arrow Lake (microprocessor)|Arrow Lake]]</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);"></td>
</tr>
<tr>
<td><b>Darkmont</b></td>
<td>''Darkmont''</td>
<th>18A</th>
<td><b>Cougar Cove</b></td>
<td>''[[Panther Lake (microprocessor)|Panther Lake]]''</td>
<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);"></td>
</tr>
</table>

Revision as of 00:41, 11 October 2024

Atom roadmap[1]
Fabri-
cation
process 		Micro-
archi-
tecture 		Release
date 		Processors/SoCs
MID, smartphone Tablet Netbook Nettop Embedded Server Communication CE
45 nm Bonnell 2008 Silverthorne — Diamondville Tunnel Creek,
Stellarton 		— Un­known Sodaville
2010 Lincroft Pineview Groveland
32 nm Saltwell 2011 Medfield (Penwell & Lexington),
Clover Trail+ (Cloverview) 		Clover Trail (Cloverview) Cedar Trail (Cedarview) Un­known Centerton & Briarwood Un­known Berryville
22 nm Silvermont 2013 Merrifield (Tangier),[2] Slayton,
Moorefield (Anniedale)[3] 		Bay Trail-T
(Valleyview) 		Bay Trail-M
(Valleyview) 		Bay Trail-D
(Valleyview) 		Bay Trail-I
(Valleyview) 		Avoton Rangeley Un­known
014 nm[1] Airmont 2014 Binghamton & Riverton Cherry Trail-T (Cherryview)[4] Braswell[5] Denverton Cancelled Un­known Un­known
Goldmont
[6] 		2016 Broxton Cancelled Willow Trail Cancelled
Apollo Lake 		Apollo Lake[7] Denverton[8] Un­known Un­known
Goldmont
Plus[9] 		2017 Un­known Un­known Gemini Lake[10]
Gemini Lake Refresh[11] 		Un­known Un­known Un­known
10 nm Tremont[12] 2020 Un­known Lakefield (hybrid) Lakefield (hybrid)[13]
Elkhart Lake[14]
Jasper Lake[15] 		Jacobsville
Parker Ridge[16]
Snow Ridge[17] 		Un­known Un­known
Intel 7 Gracemont[18] 2021 Un­known Un­known Alder Lake (hybrid)[19]
Raptor Lake (hybrid)
Alder Lake-N[20][21] 		Un­known Un­known Un­known
Intel 4 Crestmont 2023 Un­known Un­known Meteor Lake (hybrid) Grand Ridge Un­known Un­known
TSMC N6 Un­known Un­known Un­known Un­known Un­known
Intel 3 2024 Un­known Un­known Un­known Un­known Un­known Sierra Forest Un­known Un­known
TSMC N3B Skymont 2024 Un­known Un­known Lunar Lake (hybrid) Un­known Un­known Un­known
Un­known Un­known Arrow Lake (hybrid) Un­known Un­known Un­known
Intel 18A Darkmont 2025 Un­known Un­known Un­known Un­known Un­known Clearwater Forest Un­known Un­known
  1. ^ a b "Intel's Silvermont Architecture Revealed: Getting Serious About Mobile". AnandTech.
  2. ^ Hiroshige, Goto. "Intel Products for Tablets & SmartPhones" (PDF). 標準. Impress. Archived from the original (PDF) on 2013-11-14.
  3. ^ "Import Data and Price of anniedale". Archived from the original on 2015-05-17. Retrieved 2015-09-23.
  4. ^ "アウトオブオーダーと最新プロセスを採用する今後のAtom". 30 November 2012.
  5. ^ "Products (Formerly Braswell)". Intel ARK (Product Specs). Retrieved 5 April 2016.
  6. ^ Smith, Ryan; Cutress, Ian (29 April 2016). "Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Canceled". Anandtech.com. Retrieved 29 June 2016.
  7. ^ "Products (Formerly Apollo Lake)". Intel ARK (Product Specs). Retrieved 6 January 2016.
  8. ^ "Products (Formerly Denverton)". Intel ARK (Product Specs). Retrieved 6 January 2016.
  9. ^ Shilov, Anton (December 12, 2017). "Intel Launches New Pentium Silver and Celeron Atom Processors: Gemini Lake is Here". AnandTech.
  10. ^ "Products (Formerly Gemini Lake)". Intel ARK (Product Specs). Retrieved 11 December 2017.
  11. ^ "Products (Formerly Gemini Lake Refresh)". Intel ARK (Product Specs). Retrieved 4 November 2019.
  12. ^ Cutress, Dr Ian. "Intel's new Atom Microarchitecture: The Tremont Core in Lakefield". AnandTech. Retrieved 2019-11-17.
  13. ^ "Products formerly Lakefield". Intel ARK (Product Specs).
  14. ^ "Products formerly Elkhart Lake". Intel ARK (Product Specs).
  15. ^ "Products formerly Jasper Lake".
  16. ^ "Products formerly Parker Ridge".
  17. ^ "Products formerly Snow Ridge". Intel ARK (Product Specs).
  18. ^ "Intel Architecture Day 2021: Alder Lake, Golden Cove, and Gracemont Detailed".
  19. ^ "Products formerly Alder Lake". Intel ARK (Product Specs).
  20. ^ "Intel Introduces New Intel Processor for Upcoming Essential Segment".
  21. ^ "Products formerly Alder Lake-N".
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