Socket FS1: Difference between revisions
Appearance
Content deleted Content added
No edit summary |
added retrieve date |
||
Line 15: | Line 15: | ||
The '''Socket FS1''' is a CPU socket to be implemented in the future notebook platform from [[Advanced Micro Devices|AMD]] with its [[AMD Fusion|Fusion]] processors (codenamed ''Swift''). <ref name="AMDDecAnalyst">[http://download.amd.com/Corporate/MarioRivasDec2007AMDAnalystDay.pdf AMD Financial Analyst Day 2007 presentation], presented by Mario Rivas, pages 16, 22 of 28. Retrieved December 14, 2007</ref> |
The '''Socket FS1''' is a CPU socket to be implemented in the future notebook platform from [[Advanced Micro Devices|AMD]] with its [[AMD Fusion|Fusion]] processors (codenamed ''Swift''). <ref name="AMDDecAnalyst">[http://download.amd.com/Corporate/MarioRivasDec2007AMDAnalystDay.pdf AMD Financial Analyst Day 2007 presentation], presented by Mario Rivas, pages 16, 22 of 28. Retrieved December 14, 2007</ref> |
||
While the processor will implement an "high-end GPU core with UVD" functionality, former ATI CEO Dave Orton has stated that Fusion products will have 10% more pins than a "normal CPU" <ref>[http://www.fudzilla.com/index.php?option=com_content&task=view&id=1316&Itemid=1 Fudzilla report]</ref> but further elaborate on what is a "normal CPU" was not given. |
While the processor will implement an "high-end GPU core with UVD" functionality, former ATI CEO Dave Orton has stated that Fusion products will have 10% more pins than a "normal CPU" <ref>[http://www.fudzilla.com/index.php?option=com_content&task=view&id=1316&Itemid=1 Fudzilla report], retrieved December 14, 2007</ref> but further elaborate on what is a "normal CPU" was not given. |
||
==See also== |
==See also== |
Revision as of 11:29, 20 December 2007
Type | ? |
---|---|
Chip form factors | ? |
Contacts | ? |
FSB protocol | ? |
FSB frequency | ? |
Voltage range | ? |
Processors | future mobile Fusion products (Swift) |
This article is part of the CPU socket series |
The Socket FS1 is a CPU socket to be implemented in the future notebook platform from AMD with its Fusion processors (codenamed Swift). [1]
While the processor will implement an "high-end GPU core with UVD" functionality, former ATI CEO Dave Orton has stated that Fusion products will have 10% more pins than a "normal CPU" [2] but further elaborate on what is a "normal CPU" was not given.
See also
References
- ^ AMD Financial Analyst Day 2007 presentation, presented by Mario Rivas, pages 16, 22 of 28. Retrieved December 14, 2007
- ^ Fudzilla report, retrieved December 14, 2007