PowerPC 601: Difference between revisions
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===Bus Interface=== |
===Bus Interface=== |
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===Branch Processing Unit=== |
===Branch Processing Unit=== |
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Revision as of 20:35, 4 September 2005
The PowerPC 601 was the first generation of microprocessors to supports a sub-set of the PowerPC Architecture. It was introduced at the same time as IBM POWER2 line of processors. Basically it a simpified and thus cheaper version of the POWER series processor. The PowerPC 601 was developed in co-operation of IBM, Motorola and Apple.
Industry Target
Functional Layout
Execution Unit
Fixed Point Execution Unit
Floating Point Exection Unit
Bus Interface
Branch Processing Unit
Symmetric Multiprocessing
Memory Managment Unit
Parametrics
| Clock 50MHz | 50Mhz < ??? | ||
|---|---|---|---|
| Power | 6.5 W | 3.6 V @ 50MHz | |
| Transistors | 2.8 million | ||
| Gate | ??? | ??? | |
| Gate oxide | ???? | ||
| Metal-layer | pitch | thickness | |
| M1 | ?? | ?? | |
| M2 | ?? | ?? | |
| M3 | ?? | ?? | |
| M4 | ?? | ?? | |
| Dielectric | ?? | ||
| Vdd | ?? | ?? | |
| Die Size | 10.95mmX10.95mm | ||
| Package | 304pin QuadFlatPack(QFP) | ||
| I/O | 184 Signals | ||
| Frequiency | SPECint92 | SPECfp92 | |
| 66MHz | >60 | >70 |