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Tilera Corporation is a fabless semiconductor company focusing on scalable multicore embedded processor design. The company is currently shipping mutiple products, including the TILE64, TILEPro64, TILEPro36, and the TILE-Gx microprocessors.

History

In 1990, Dr. Anant Agarwal led a team of researchers at Massachusetts Institute of Technology to develop scalable multi-processor system built out of large numbers of single chip processors. Alewife machines integrated both shared memory and user-level message passing for inter-node communications ^[1].

In 1997, Dr. Agarwal proposed a follow-on project using a mesh technology to connect multiple cores. The follow-on project, named RAW, commenced in 1997, and was supported by DARPA/NSF's funding of tens of millions, resulting in the world's first 16-processor tiles multicore and proving the mesh and compiler technology.

Tilera was founded in October, 2004, by professor Dr. Anant Agarwal, Devesh Garg, and Vijay K. Aggarwal. Within the same month, Tilera launched its first product, the 64-core TILE64 processor, in August 2007. Tilera is venture funded by Bessemer Venture Partners, Walden International, Columbia Capital and VentureTech Alliance. The company is headquartered in San Jose, Calif. and operates a research and development facility in Westborough, Massachusetts, USA.

Products

Tilera's primary product family is the Tile CPU. Tile is a multicore design, with the cores communicating over on a new mesh architecture, called iMesh, intended to scale to hundreds of cores on a single chip. As of April 2009, shipping versions of Tile have 36 or 64 cores. The goal is to provide a high-performance CPU, with good power efficiency, and with greater flexibility than special-purpose processors such as DSPs. In October 2009, they announced a new chip based on 40nm technology that features 100 cores. Their primary market for this new chip, expected to begin shipping in 2011, is for commercial applications such as web indexing and search engine use. The 100 core general purpose CPU consumes 55 watts at full load. ^[2]

Tilera also provides software development tools for Tile and a line of boards built around the Tile processors.

References

^ "Tilera: About Us". Tilera: About Us. Tilera Corporation. 2009. Retrieved 2009-10-26.
^ http://www.eweek.com/c/a/IT-Infrastructure/Tilera-Talks-100Core-Processor-376613/

External links

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[1] "Tilera: About Us". Tilera: About Us. Tilera Corporation. 2009. Retrieved 2009-10-26.

[2] ttp://www.eweek.com/c/a/IT-Infrastructure/Tilera-Talks-100Core-Processor-376613/

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 ==Products==
-Tilera's primary product family is the Tile [[CPU]].  Tile is a multicore design, with the cores communicating over on a new mesh architecture, called iMesh, intended to scale to hundreds of cores on a single chip.  As of April 2009, shipping versions of Tile have 36 or 64 cores.  The goal is to provide a high-performance CPU, with good power efficiency, and with greater flexibility than special-purpose processors such as DSPs.
+Tilera's primary product family is the Tile [[CPU]].  Tile is a multicore design, with the cores communicating over on a new mesh architecture, called iMesh, intended to scale to hundreds of cores on a single chip.  As of April 2009, shipping versions of Tile have 36 or 64 cores.  The goal is to provide a high-performance CPU, with good power efficiency, and with greater flexibility than special-purpose processors such as DSPs.  In October 2009, they announced a new chip based on 40nm technology that features 100 cores.  Their primary market for this new chip, expected to begin shipping in 2011, is for commercial applications such as web indexing and search engine use.  The 100 core general purpose CPU consumes 55 watts at full load. <ref>http://www.eweek.com/c/a/IT-Infrastructure/Tilera-Talks-100Core-Processor-376613/</ref>
 Tilera also provides software development tools for Tile and a line of boards built around the Tile processors.