PowerVR

PowerVR is a division of Imagination Technologies (formerly VideoLogic) that develops hardware and software for 2D and 3D rendering, and for video encoding, decoding, associated image processing and DirectX, OpenGL ES, OpenVG, and OpenCL acceleration.

The PowerVR product line was originally introduced to compete in the desktop PC market for 3D hardware accelerators with a product with a better price/performance ratio than existing products like those from 3dfx Interactive. Rapid changes in that market, notably with the introduction of OpenGL and Direct3D, led to rapid consolidation; Most of the smaller players, like PowerVR, were pushed from the marketplace.

PowerVR responded by introducing new versions with low-power electronics that were aimed at the laptop computer market. Over time this developed into a series of designs that could be incorporated into system-on-a-chip architectures suitable for handheld device use. In this form, PowerVR is a leading vendor in the mobile space, found in many embedded systems, palmtops, and smartphones.

PowerVR accelerators are not manufactured by PowerVR, but instead their integrated circuit designs and patents are licensed to other companies, such as Texas Instruments, Intel, NEC, Renesas, Samsung, STMicroelectronics, Freescale, Apple, NXP Semiconductors (formerly Philips Semiconductors), and many others.

Technology

The PowerVR chipset uses a method of 3D rendering known as tile-based deferred rendering (often abbreviated as TBDR). As the polygon generating program feeds triangles to the PowerVR (driver), it stores them in memory in a triangle strip or an indexed format. Unlike other architectures, polygon rendering is (usually) not performed until all polygon information has been collated for the current frame. Furthermore, the expensive operations of texturing and shading of pixels (or fragments) is delayed, whenever possible, until the visible surface at a pixel is determined — hence rendering is deferred.

In order to render, the display is split into rectangular sections in a grid pattern. Each section is known as a tile. Associated with each tile is a list of the triangles that visibly overlap that tile. Each tile is rendered in turn to produce the final image.

Tiles are rendered using a process similar to ray-casting. Rays are cast onto the triangles associated with the tile and a pixel is rendered from the triangle closest to the camera. The PowerVR hardware typically calculates the depths associated with each polygon for one tile row in 1 cycle.

This method has the advantage that, unlike a more traditional z-buffered rendering pipeline, no calculations need to be made to determine what a polygon looks like in an area where it is obscured by other geometry. It also allows for correct rendering of partially transparent polygons, independent of the order in which they are processed by the polygon producing application. (This capability was only implemented in Series 2 and one MBX variant. It is generally not included for lack of API support and cost reasons.) More importantly, as the rendering is limited to one tile at a time, the whole tile can be in fast onchip memory, which is flushed to video memory before processing the next tile. Under normal circumstances, each tile is visited just once per frame.

PowerVR is not the only pioneer of tile based deferred rendering, but the only one to successfully bring a TBDR solution to market. Microsoft also conceptualised the idea with their abandoned Talisman project. Gigapixel, a company that developed IP for tile-based deferred 3D graphics, was purchased by 3dfx, which in turn was subsequently purchased by Nvidia. Nvidia currently has no official plans to pursue tile-based rendering.

Intel uses a similar concept in their integrated graphics solutions. However, their method, coined zone rendering, does not perform full hidden surface removal (HSR) and deferred texturing, therefore wasting fillrate and texture bandwidth on pixels that are not visible in the final image.

Recent advances in hierarchical Z-buffering have effectively incorporated ideas previously only used in deferred rendering, including the idea of being able to split a scene into tiles and of potentially being able to accept or reject tile sized pieces of polygon.

Today, the PowerVR software and hardware suite supports video encoding, decoding, associated image processing and Direct X, OpenGL ES, OpenVG, and OpenCL acceleration.

Power VR chipsets

Series 1 (NEC)

VideoLogic Apocalypse 3Dx (NEC PowerVR PCX2 chip)

PowerVR's initial products were available as the OEM graphics on some Compaq models, and as PCI cards from vendors such as Matrox.

Series 2 (NEC)

The second generation PowerVR2 ("PowerVR Series 2", chip codename "CLX2") chip found a market in the Dreamcast console between 1998 and 2001. As part of an internal competition at Sega to design the successor to the Saturn, the PowerVR2 was licensed to NEC and was chosen ahead of a rival design based on the 3dfx Voodoo 2. Thanks to the performance of the PowerVR2, several Dreamcast games such as Quake III Arena could rival their PC counterparts in quality and performance. However, the success of the Dreamcast meant that the PC variant, sold as Neon 250, appeared a year late to the market and was at that time mid-range at best.

Series 3 (STMicro)

Kyro II.

In 2001, STMicroelectronics adopted the third generation PowerVR3 for their STG4000 KYRO and STG 4500 KYRO II (displayed) chips. The STM PowerVR3 KYRO II, released in 2001, was able to rival the more expensive ATI Radeon DDR and NVIDIA GeForce 2 GTS in graphic benchmarks of the time, despite not having hardware Transform and lighting (T&L). As games were increasingly optimized for hardware T&L, the KYRO II lost its performance advantage.

Series 4 (STMicro)

STM's STG5000 chip, based upon the PowerVR4, did include hardware T&L but never came to commercial fruition. It and the KYRO 3 (2D/3D AIB) were shelved due to STMicro closing its graphics division.

MBX

PowerVR achieved great success in the mobile graphics market with its low power PowerVR MBX. MBX, and its SGX successors, are licensed by seven of the top ten semiconductor manufacturers including Intel, Texas Instruments, Samsung, NEC, NXP Semiconductors, Freescale, Renesas and Sunplus. The chips are in use in many high-end cellphones including the original iPhone, Nokia N95, Sony Ericsson P1 and Motorola RIZR Z8, as well as some iPods.

There are two variants: MBX and MBX Lite. Both have the same feature set. MBX is optimized for speed and MBX Lite is optimized for low power consumption. MBX can be paired up with an FPU, Lite FPU, VGP Lite and VGP.

PowerVR Video Cores(MVED/VXD) and Video/Display Cores(PDP)

PowerVR's PDP series is used in some HDTVs, including the Sony BRAVIA.

Series 5 (SGX)

PowerVR's Series5 SGX series features pixel, vertex, and geometry shader hardware, supporting OpenGL ES 2.0 and DirectX 10.1 with Shader Model 4.1.

The SGX GPU core is included in several popular systems-on-chip (SoC) used in many portable devices. Apple uses the A4 (manufactured by Samsung) in their iPhone 4, iPad, iPod touch, and Apple TV. Texas Instruments' OMAP 3 and 4 series SoC's are used in the BlackBerry PlayBook, Nokia N900, Sony Ericsson Vivaz, Motorola Droid/Milestone, Droid Bionic, Archos 70, Palm Pre, Galaxy Nexus, Open Pandora, and others. Samsung produces the Hummingbird SoC and use it in their Galaxy S, Galaxy Tab, Samsung Wave S8500 Samsung Wave II S8530, Samsung Galaxy SL devices.

Intel uses the SGX 540 in its Medfield platform.

Series 5XT (SGXMP)

PowerVR Series5XT SGXMP chips are multi-core variants of the SGX series with some updates. It is included in the PlayStation Vita portable gaming device with the MP4+ Model of the PowerVR SGX543, the only intended difference, aside from the + indicating features customized for Sony, is the cores, where MP4 denotes 4 cores (quad-core) whereas the MP8 denotes 8 cores (octo-core). The Apple iPad 2 and iPhone 4S with the A5 SoC also feature a dual-core SGX543MP2. The latest New iPad is using the MP4 Model with quad cores.

Series 6 (Rogue)

PowerVR Series6 is Imagination’s next generation architecture,It is codenamed ‘Rogue’. ST-Ericsson has announced that its new Nova application processors will include Imagination’s next-generation POWERVR Series6 ‘Rogue’ architecture.

List of PowerVR chipsets

See also: List of PowerVR products

• ^[1] Official Imgtec data
• ^[2] USSE (Universal Scalable Shader Engine) pipes/TMUs
• ^[3] USSE2 (Universal Scalable Shader Engine 2) pipes/TMUs
• All models support Tile based deferred rendering (TBDR)

Series 1

• All models support DirectX 3.0

Model	Launch	Fab (nm)	Memory (MiB)	Core clock (MHz)	Memory clock (MHz)	Config core1	Fillrate				Memory
							MOperations/s	MPixels/s	MTextels/s	MVertices/s	Bandwidth (GB/s)	Bus type	Bus width (bit)
PCX1	1996	500	4	60	60	1:0:1:1	60	60	60	0	0.48	SDR	64
PCX2	1997	350	4	66	66	1:0:1:1	66	66	66	0	0.528	SDR	64

• ¹ Pixel shader : Vertex shader  : Texture mapping unit : Render Output unit

Series 2

• All models are fabricated with a 250 nm process
• All models support DirectX 6.0 and the PMX1 supports Mini-GL

Model	Launch	Memory (MiB)	Core clock (MHz)	Memory clock (MHz)	Config core1	Fillrate				Memory
						MOperations/s	MPixels/s	MTextels/s	MVertices/s	Bandwidth (GB/s)	Bus type	Bus width (bit)
CLX2	1998	8	100	100	1:0:1:1	100	100	100	0	0.8	SDR	64
PMX1	1999	32	125	125	1:0:1:1	125	125	125	0	1	SDR	64

• ¹ Pixel shader : Vertex shader  : Texture mapping unit : Render Output unit

Series 3

• All models support DirectX 6.0

Model	Launch	Fab (nm)	Memory (MiB)	Core clock (MHz)	Memory clock (MHz)	Config core1	Fillrate				Memory
							MOperations/s	MPixels/s	MTextels/s	MVertices/s	Bandwidth (GB/s)	Bus type	Bus width (bit)
STG4000	2000	250	32/64	115	115	2:0:2:2	230	230	230	0	1.84	SDR	128
STG4500	2001	180	32/64	175	175	2:0:2:2	350	350	350	0	2.8	SDR	128
STG4800	Never Released	180	64	200	200	2:0:2:2	400	400	400	0	3.2	SDR	128
STG5500	Never Released	130	64	250	250	4:0:4:4	1000	1000	1000	0	4	DDR	128

• ¹ Pixel shader : Vertex shader  : Texture mapping unit : Render Output unit

Series 4

Model	Year	Die Size (mm2)[1]	Config core	Fillrate (@ 200 MHz)		Bus width (bit)	API (version)
				MTriangles/s[1]	MPixel/s[1]		DirectX	OpenGL
MBX Lite	Feb 2001	4@130 nm?	0/1/1/1	3.4	270	64	8.0	1.1
MBX	Feb 2001	8@130mm?	0/1/1/1	7.4	600	64	8.0	1.1

Series 5

Model	Year	Die Size (mm2)[1]	Config core[2]	Fillrate (@ 200 MHz)		Bus width (bit)	API (version)			GFLOPS(@ 200 MHz)
				MTriangles/s[1]	MPixel/s[1]		DirectX	OpenGL	OpenGL ES
SGX520	Jul 2005	2.6@65 nm	1/1	7	250	64	N/A	N/A	2.0	1.8
SGX530	Jul 2005	7.2@90 nm	2/1	14?	500?	64	N/A	N/A	2.0	1.6?
SGX531	Oct 2008	?	2/1	14?	500?	128	N/A	N/A	2.0	1.6?
SGX535	Nov 2007	65nm	2/2	14	500	64	9.0c	2.1	2.0	1.6
SGX540	Nov 2007	?	4/2	20-30	1000?	64	N/A	N/A	2.0	7.2
SGX545	Jan 2010	12.5@65 nm	4/2	40	1000	64	10.1	3.0	2.0	7.2

Series 5XT

Model	Date	Cores	Die Size (mm2)[1]	Config core[3]	Fillrate (@ 200 MHz)		Bus width (bit)	API (version)		GFLOPS(@ 200 MHz,per core)
					MTriangles/s[1]	MPixel/s[1]		DirectX	OpenGL
SGX543	Jan 2009	1-16	8@65 nm	4/2	35	1000	64	9.0	2.1	7.2
SGX544	Jun 2010	1-16	8@65 nm	4/2	35	1000	64	9.0/L3	2.1	7.2
SGX554	Dec 2010	1-16	?	8/2	?	?	64	9.0/L3	2.1	?

These GPU can be used in either single-core or multi-core configurations.

Series 6

Model	Date	Cores	Die Size (mm2)	Config core[3]	Fillrate		Bus width (bit)	API (version)		Features
					MTriangles/s	MPixel/s		DirectX	OpenGL
Series 6 (Rogue)	Jan 2012	?	?	?	380 million ‘real’ polygons per second	5000		11.1	4.2	USSEx
G6200		2	?	?	?	?		?	?	?
G6400		4	?	?	?	?		?	?	?

See also

• List of PowerVR products

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External links

• Official website
• PowerVR Technology Overview