Language for Instruction Set Architecture: Difference between revisions
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=== Books === |
=== Books === |
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* [[Oliver Wahlen]]: ''C Compiler Aided Design of Application-specific Instruction-set Processors Using the Machine Description Language LISA (Berichte Aus Der Electrotechnik)'', [[Shaker Verlag]] GmbH, Germany (August 13, 2004) , ISBN 3-8322-3035-1 |
* [[Oliver Wahlen]]: ''C Compiler Aided Design of Application-specific Instruction-set Processors Using the Machine Description Language LISA (Berichte Aus Der Electrotechnik)'', [[Shaker Verlag]] GmbH, Germany (August 13, 2004) , ISBN 3-8322-3035-1 |
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* [[Anupam Chattopadhyay, Heinrich Meyr and Rainer Leupers]]: ''LISA: A Uniform ADL for Embedded Processor Modeling, Implementation and Software Toolsuite Generation in Processor Description Languages, Volume 1'', [[Morgan Kaufmann]], ISBN-10: 0123742870 |
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=== Archives === |
=== Archives === |
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Revision as of 10:06, 1 August 2012
| Designed by | Vojin Zivojnovic, Stefan Pees, version 1.0 |
|---|---|
| First appeared | 1997, last revised 2007 |
| Website | http://darwin.bth.rwth-aachen.de/opus3/frontdoor.php?source_opus=661&la=de |
| Dialects | |
| LISA 2.0, LISA+ | |
LISA is a language targeting the description of instruction set architecture. The aim is to capture all the information required to generate software tools (compiler, assembler, instruction set simulator, ...) and implementation hardware (in VHDL or Verilog) of a given processor core.
LISA is not focused on the modeling of other on-chip components around the processor core itself, such as peripherals, hardware accelerators, buses and memories; Other languages such as SystemC will be used for these.
While the scope of the language is quite large, many industrial cases are targeting a subset of its possibility. For instance LISA have been used to re-implement the hardware of certain processor core keeping the binary compatibility with the legacy version, as all software tools did already exist and legacy compiled software images could be executed on the newly created hardware.
Another focus case has been to focus only on generating ISS (instruction set simulator), most known case are the ARM Architecture ISSes.
The language has not been yet standardised by IEEE nor ISO and is currently owned by RWTH Aachen University, in Germany.
Features
![[icon]](/enwiki/wiki/File:Wiki_letter_w_cropped.svg){kind=small} | This section is empty. You can help by adding to it. (July 2010) |
History
Initially developed at Institute for Integrated Signal Processing Systems (ISS) Aachen, belonging to RWTH Aachen University, in Germany.
The current official version from RWTH Aachen is LISA 2.0
The language is still in evolution to cover newly (and future) research on micro-computers, this includes Reconfigurable computing (in LISA 3.0) , multi-core, parallel programming, ...
One noticeable branch has been created for handling the modeling of peripherals (such as interrupt controller, timer, ...); Called LISA+. (see infocenter.arm.com and search for LISA+ Reference Language Manual)
See also
Notes
References
 | This article includes a list of general references, but it lacks sufficient corresponding inline citations. (April 2009) |
Books
- Oliver Wahlen: C Compiler Aided Design of Application-specific Instruction-set Processors Using the Machine Description Language LISA (Berichte Aus Der Electrotechnik), Shaker Verlag GmbH, Germany (August 13, 2004) , ISBN 3-8322-3035-1
- Anupam Chattopadhyay, Heinrich Meyr and Rainer Leupers: LISA: A Uniform ADL for Embedded Processor Modeling, Implementation and Software Toolsuite Generation in Processor Description Languages, Volume 1, Morgan Kaufmann, ISBN-10: 0123742870
Archives
| This section is empty. You can help by adding to it. (January 2011) |