Intel ADX: Difference between revisions
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'''Intel ADX''' ('''Multi-Precision Add-Carry Instruction Extensions''') is [[Intel]]'s [[arbitrary-precision arithmetic]] extension to the [[x86]] [[instruction set architecture]] (ISA). Intel ADX was first supported in the [[Broadwell (microarchitecture)|Broadwell]] [[microarchitecture]].<ref>{{cite web|url=http://software.intel.com/en-us/articles/intel-software-development-emulator |title=Intel Software Development Emulator |website=software.intel.com |date=July 23, 2013 |accessdate=October 16, 2013}}</ref><ref>[ |
'''Intel ADX''' ('''Multi-Precision Add-Carry Instruction Extensions''') is [[Intel]]'s [[arbitrary-precision arithmetic]] extension to the [[x86]] [[instruction set architecture]] (ISA). Intel ADX was first supported in the [[Broadwell (microarchitecture)|Broadwell]] [[microarchitecture]].<ref>{{cite web|url=http://software.intel.com/en-us/articles/intel-software-development-emulator |title=Intel Software Development Emulator |website=software.intel.com |date=July 23, 2013 |accessdate=October 16, 2013}}</ref><ref>[https://software.intel.com/sites/default/files/319433-013b.pdf Intel Architecture Instruction Set Extensions Programming Reference] (Document number 319433-013B) // Intel, July 2012, Chapter 9: Additional new instructions</ref> |
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The instruction set extension contains just two new instructions, though <code>MULX</code> from [[BMI2]] is also considered as a part of the large integer arithmetic support.<ref name="adcref">{{cite web |url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf |title= New Instructions Supporting Large Integer Arithmetic on Intel Architecture Processors |publisher=[[Intel]] |accessdate=2 January 2015}}</ref> |
The instruction set extension contains just two new instructions, though <code>MULX</code> from [[BMI2]] is also considered as a part of the large integer arithmetic support.<ref name="adcref">{{cite web |url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf |title= New Instructions Supporting Large Integer Arithmetic on Intel Architecture Processors |publisher=[[Intel]] |accessdate=2 January 2015}}</ref> |
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Revision as of 08:31, 9 October 2015
Intel ADX (Multi-Precision Add-Carry Instruction Extensions) is Intel's arbitrary-precision arithmetic extension to the x86 instruction set architecture (ISA). Intel ADX was first supported in the Broadwell microarchitecture.[1][2]
The instruction set extension contains just two new instructions, though MULX from BMI2 is also considered as a part of the large integer arithmetic support.[3]
Both instructions are more efficient variants of the existing ADC instruction, with the difference that each of the two new instructions affects only one flag, where ADC as a signed addition may set both overflow and carry flags, and as an old-style x86 instruction also reset the rest of the CPU flags. Having two versions affecting different flags means that two chains of additions with carry can be calculated in parallel.[3]
| Instruction | Description |
|---|---|
ADCX
|
Adds two unsigned integers plus carry, reading the carry from the carry flag and if necessary setting it there. Does not affect other flags than the carry. |
ADOX
|
Adds two unsigned integers plus carry, reading the carry from the overflow flag and if necessary setting it there. Does not affect other flags than the overflow. |
References
- ^ "Intel Software Development Emulator". software.intel.com. July 23, 2013. Retrieved October 16, 2013.
- ^ Intel Architecture Instruction Set Extensions Programming Reference (Document number 319433-013B) // Intel, July 2012, Chapter 9: Additional new instructions
- ^ a b "New Instructions Supporting Large Integer Arithmetic on Intel Architecture Processors" (PDF). Intel. Retrieved 2 January 2015.
External links
- Intel Architecture Instruction Set Extensions Programming Reference (PDF). Intel. July 2013. Retrieved 2013-09-10.
- "New Instructions Supporting Large Integer Arithmetic on Intel® Architecture Processors" (PDF).