Jump to content

Timer coalescing: Difference between revisions

From Wikipedia, the free encyclopedia
Content deleted Content added
Add a link to the tickless kernel article
m See also: layout tweaks
Line 12: Line 12:


== See also ==
== See also ==
{{Div col}}
* [[Advanced Configuration and Power Interface]] (ACPI)
* [[Advanced Configuration and Power Interface]] (ACPI)
* [[Advanced Programmable Interrupt Controller]] (APIC)
* [[Advanced Programmable Interrupt Controller]] (APIC)
Line 27: Line 28:
* [[Time Stamp Counter]] (TSC)
* [[Time Stamp Counter]] (TSC)
* [[Tickless kernel]]
* [[Tickless kernel]]
{{Div col end}}


== References ==
== References ==

Revision as of 12:22, 13 February 2016

Timer coalescing is a computer system energy-saving technique that reduces central processing unit (CPU) power consumption by reducing the precision of software timers to allow the synchronization of process wake-ups, minimizing the number of times the CPU is forced to perform the relatively power-costly operation of entering and exiting idle states.[1]

See also

References

  1. ^ Anderson, Nate (June 11, 2013). "How OS X "Mavericks" works its power-saving magic". Ars Technica. Retrieved 2014-03-22.
  2. ^ "Linux Kernel 2 6 22". kernelnewbies.org. Retrieved 2014-03-22.
  3. ^ "Add support for deferrable timers". 2007-05-08. Retrieved 2014-03-22.
  4. ^ "time(7) - Linux manual page". Man7.org. Retrieved 2014-03-24.
  5. ^ "prctl(2) - Linux manual page". Man7.org. Retrieved 2014-03-24.
  6. ^ "Windows Timer Coalescing". Microsoft. January 20, 2009. Retrieved 2009-04-21.
  7. ^ "OS X Mavericks - Advanced Technologies". Apple Inc. Retrieved 2014-03-22.
  8. ^ "OS X Mavericks: Core Technologies Overview" (PDF). Apple, Inc. June 10, 2013. Retrieved 2013-06-10.