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The '''multiprocessor system-on-chip''' ('''MPSoC''') is a [[system-on-a-chip]] (SoC) which uses multiple processors (see [[multi-core]]), usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogenous (computing)|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using [[scratchpad RAM]] and [[direct memory access|DMA]]) and I/O components. All these components are linked to each other by an [[on-chip interconnect]]. These architectures meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.
The '''multiprocessor system-on-chip''' ('''MPSoC''') is a [[system-on-a-chip]] (SoC) which uses multiple processors (see [[multi-core]]), usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogenous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using [[scratchpad RAM]] and [[direct memory access|DMA]]) and I/O components. All these components are linked to each other by an [[on-chip interconnect]]. These architectures meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.


==Benchmarks==
==Benchmarks==

Revision as of 06:01, 3 May 2016

The multiprocessor system-on-chip (MPSoC) is a system-on-a-chip (SoC) which uses multiple processors (see multi-core), usually targeted for embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using scratchpad RAM and DMA) and I/O components. All these components are linked to each other by an on-chip interconnect. These architectures meet the performance needs of multimedia applications, telecommunication architectures, network security and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.

Benchmarks

MPSoC research and development often compares many options. Benchmarks, such as COSMIC,[1] are developed to help such evaluations.

Examples

See also

References

  1. ^ "COSMIC Heterogeneous Multiprocessor Benchmark Suite"
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