Multiprocessor system on a chip: Difference between revisions

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A multiprocessor system-on-chip (MPSoC, /ˌɛmˌpiːˈsɒk/ em-pee-SOCK or /ˌɛmˌpiːˌɛsˌoʊˈsiː/ em-PEE-ess-oh-SEE) is a system-on-a-chip (SoC) which includes multiple microprocessors. As such, it is a multi-core System-on-Chip.

MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using scratchpad RAM and DMA) and I/O components. All these components are linked to each other by an on-chip interconnect. These architectures meet the performance needs of multimedia applications, telecommunication architectures, network security and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.

Benchmarks

MPSoC research and development often compares many options. Benchmarks, such as COSMIC,^[1] are developed to help such evaluations.

Examples

References

^ "COSMIC Heterogeneous Multiprocessor Benchmark Suite"

External links

This computer hardware article is a stub. You can help Wikipedia by expanding it.

[1] "COSMIC Heterogeneous Multiprocessor Benchmark Suite"

[1]

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-A '''multiprocessor system-on-chip''' ('''MPSoC''') is a [[system-on-a-chip]] (SoC) which uses multiple processors  (see [[multi-core]]), usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using [[scratchpad RAM]] and [[direct memory access|DMA]]) and I/O components. All these components are linked to each other by an [[Network on a chip|on-chip interconnect]]. These architectures meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.
+A '''multiprocessor system-on-chip''' ({{Abbr|'''MPSoC'''|Multi-processor System on a Chip}}''',''' {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|'|s|ɒ|k}} ''{{respell|em|pee|SOCK}}'' or {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|ˌ|ɛ|s|ˌ|oʊ|ˈ|s|iː|}} {{respell|em|PEE|ess|oh|SEE}}) is a [[system-on-a-chip]] (SoC) which includes multiple [[microprocessors]]. As such, it is a [[multi-core]] System-on-Chip.
+MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using [[scratchpad RAM]] and [[direct memory access|DMA]]) and I/O components. All these components are linked to each other by an [[Network on a chip|on-chip interconnect]]. These architectures meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.
 ==Benchmarks==
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 *[[Cell_(microprocessor)|CELL processor]]
 *[[Adapteva|Adapteva's Epiphany architecture]]
+*[[Raspberry Pi]]
 ==See also==
 *[[Multi-core (computing)]]
-*[[System-on-a-chip]]
+*[[System on a chip]], of which an MPSoC is a subtype.
 *[[manycore]]
 *[[Multiprocessing]]