Multiprocessor system on a chip: Difference between revisions
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{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}} |
{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}} |
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A multiprocessor system-on-chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. |
A multiprocessor system-on-chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. Additionally, MPSoCs typically contain: |
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at least one [[processor core]] |
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** This can be a [[microcontroller]] (μC), [[microprocessor]] (μP), [[digital signal processor]] (DSP) or [[application-specific instruction set processor]] (ASIP) core. |
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**[[Crystal oscillator|crystal oscillators]] and [[Phase-locked loop|phase-locked loops]] are popular clock generators. |
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** [[Multi-processor system-on-chip|Multiprocessor SoCs]] have more than one processor core. |
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* [[Computer memory|memory blocks]] including a selection of [[Read-only memory|ROM]], [[Random-access memory|RAM]], [[EEPROM]] and [[flash memory]]<ref name="Furber ARM">{{Cite book|url=https://www.worldcat.org/oclc/44267964|title=ARM system-on-chip architecture|last=Furber|first=Stephen B.|publisher=Addison-Wesley|year=2000|isbn=0201675196|location=Harlow, England|pages=|oclc=44267964}}</ref> |
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* external [[Electrical connector|interfaces]], typically for [[Communication protocol|communication protocols]] |
* external [[Electrical connector|interfaces]], typically for [[Communication protocol|communication protocols]] |
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** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc. |
** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc. |
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** each interface is typically to one given core or logical unit on the MPSoC |
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** These interfaces will differ according to the intended application. |
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*a [[Network on a chip|network-on-chip]] (NoC) to communicate and share data between the processors and [[Functional unit|functional units]] of the MPSoC |
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* [[Analog signal|analog]] interfaces including [[Analog-to-digital converter|analog-to-digital]] and [[Digital-to-analog converter|digital-to-analog converters]] |
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** These may be able to interface with different types of [[Sensor|sensors]] or [[Actuator|actuators]], including [[Smart transducer|smart transducers]] |
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** They may interface with application-specific [[Modularity|modules]] or shields.<ref group="nb">In [[Embedded system|embedded systems]], "shields" are analogous to [[Expansion card|expansion cards]] for [[Personal computer|PCs]]. They often fit over a [[microcontroller]] such as an [[Arduino]] or [[single-board computer]] such as the [[Raspberry Pi]] and function as [[Peripheral|peripherals]] for the device.</ref> |
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** Or they may be internal to the SoC, such as if an analog sensor is built-in to the SoC and its readings must be converted to digital signals for mathematical processing. |
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* [[Voltage regulator|voltage regulators]] and [[power management]] circuits |
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== Applications == |
== Applications == |
Revision as of 07:57, 11 October 2018
A multiprocessor system-on-chip (MPSoC, /ˌɛmˌpiːˈsɒk/ em-pee-SOCK or /ˌɛmˌpiːˌɛsˌoʊˈsiː/ em-PEE-ess-oh-SEE) is a system-on-a-chip (SoC) which includes multiple microprocessors. As such, it is a multi-core System-on-Chip.
MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and I/O components. All these components are linked to each other by an on-chip interconnect called a Network-on-Chip (NoC). These architectures meet the performance needs of multimedia applications, telecommunication architectures, network security and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.
Structure
This section needs expansion. You can help by adding to it. (October 2018) |
A multiprocessor system-on-chip must by definition have multiple processor cores. MPSoCs often contain multiple logically distinct processor modules as well. Additionally, MPSoCs typically contain:
- Memory blocks, often using scratchpad RAM and direct memory access
- timing sources to generate clock signals to control execution of SoC functions
- crystal oscillators and phase-locked loops are popular clock generators.
- peripherals including counters and power-on reset generators
- external interfaces, typically for communication protocols
- a network-on-chip (NoC) to communicate and share data between the processors and functional units of the MPSoC
Applications
This section needs expansion. You can help by adding to it. (October 2018) |
MPSoCs are used when microcontrollers or systems-on-chip must have multiprocessing capabilities. This can include smartphone devices, embedded systems, digital signal processors and other various applications.
Examples
This section is a short list of multiprocessor systems-on-chip.
Design considerations
This section is empty. You can help by adding to it. (October 2018) |
Benchmarks
MPSoC research and development often compares many options. Benchmarks, such as COSMIC,[1] are developed to help such evaluations.
See also
- System on a chip, of which an MPSoC is a subtype.
- Manycore processor
- Parallel computing
- Programmable system-on-chip (PSoc)
- Hardware acceleration