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A '''multiprocessor system-on-chip''' ({{Abbr|'''MPSoC'''|Multi-processor System on a Chip}}''',''' {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|'|s|ɒ|k}} ''{{respell|em|pee|SOCK}}'' or {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|ˌ|ɛ|s|ˌ|oʊ|ˈ|s|iː|}} {{respell|em|PEE|ess|oh|SEE}}) is a [[system-on-a-chip]] (SoC) which includes multiple [[microprocessors]]. As such, it is a [[multi-core]] System-on-Chip.
A '''multiprocessor system on a chip''' ({{Abbr|'''MPSoC'''|Multi-processor System on a Chip}}''',''' {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|'|s|ɒ|k}} ''{{respell|em|pee|SOCK}}'' or {{IPAc-en|ˌ|ɛ|m|ˌ|p|iː|ˌ|ɛ|s|ˌ|oʊ|ˈ|s|iː|}} {{respell|em|PEE|ess|oh|SEE}}) is a [[system on a chip]] (SoC) which includes multiple [[microprocessors]]. As such, it is a [[multi-core]] system on a chip.


MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and [[Input/output|I/O]] components. All these components are linked to each other by an on-chip interconnect, such as [[bus (computing)|buses]] and [[Network-on-Chip|Networks on chip]] (NoCs). These [[Computer architecture|architectures]] meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of [[Application-specific integrated circuit|specialised processing elements]] and architecture.
MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually [[Heterogeneous computing|heterogeneous]], processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and [[Input/output|I/O]] components. All these components are linked to each other by an on-chip interconnect, such as [[bus (computing)|buses]] and [[Network-on-Chip|Networks on chip]] (NoCs). These [[Computer architecture|architectures]] meet the performance needs of [[multimedia]] applications, [[telecommunication]] architectures, [[network security]] and other application domains while limiting the power consumption through the use of [[Application-specific integrated circuit|specialised processing elements]] and architecture.
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{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}}
{{See also|System on a chip#Structure}}{{Expand section|date=October 2018}}


A multiprocessor system-on-chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. Additionally, MPSoCs typically contain:
A multiprocessor system on a chip must by definition have multiple [[Processor core|processor cores]]. MPSoCs often contain multiple logically distinct [[Processor (computing)|processor]] modules as well. Additionally, MPSoCs typically contain:


* Memory blocks, often using [[scratchpad RAM]] and [[direct memory access]]
* Memory blocks, often using [[scratchpad RAM]] and [[direct memory access]]
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** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc.
** These are often based upon industry standards such as [[USB]], [[FireWire]], [[Ethernet]], [[Universal synchronous and asynchronous receiver-transmitter|USART]], [[Serial Peripheral Interface|SPI]], [[HDMI]], [[I²C]], etc.
** each interface is typically to one given core or logical unit on the MPSoC
** each interface is typically to one given core or logical unit on the MPSoC
*a [[Network on a chip|network-on-chip]] (NoC) to communicate and share data between the processors and [[Functional unit|functional units]] of the MPSoC
*a [[Network on a chip|network on a chip]] (NoC) to communicate and share data between the processors and [[Functional unit|functional units]] of the MPSoC


== Applications ==
== Applications ==
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*[[Manycore processor]]
*[[Manycore processor]]
*[[Parallel computing]]
*[[Parallel computing]]
*[[Programmable system-on-chip]] (PSoc)
*[[Programmable system on a chip]] (PSoc)
*[[ARM big.LITTLE]] co-architecture
*[[ARM big.LITTLE]] co-architecture
*[[Hardware acceleration]]
*[[Hardware acceleration]]

Revision as of 14:32, 9 May 2020

A multiprocessor system on a chip (MPSoC, /ˌɛmˌpˈsɒk/ em-pee-SOCK or /ˌɛmˌpˌɛsˌˈs/ em-PEE-ess-oh-SEE) is a system on a chip (SoC) which includes multiple microprocessors. As such, it is a multi-core system on a chip.

MPSoCs usually targeted for embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and I/O components. All these components are linked to each other by an on-chip interconnect, such as buses and Networks on chip (NoCs). These architectures meet the performance needs of multimedia applications, telecommunication architectures, network security and other application domains while limiting the power consumption through the use of specialised processing elements and architecture.

Structure

A multiprocessor system on a chip must by definition have multiple processor cores. MPSoCs often contain multiple logically distinct processor modules as well. Additionally, MPSoCs typically contain:

Applications

MPSoCs are used when microcontrollers or systems-on-chip must have multiprocessing capabilities. This can include smartphone devices, embedded systems, digital signal processors and other various applications.

Examples

This section is a short list of multiprocessor systems-on-chip.

Design considerations

Benchmarks

MPSoC research and development often compares many options. Benchmarks, such as COSMIC,[1] are developed to help such evaluations.

See also

References

  1. ^ "COSMIC". www.ece.ust.hk. Retrieved 2018-10-11.