Alder Lake: Difference between revisions
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==Architecture changes in comparison with Tiger Lake== |
==Architecture changes in comparison with Tiger Lake== |
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===CPU=== |
===CPU=== |
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* Intel [[Golden Cove]] CPU cores & [[Gracemont]] small CPU cores |
* Intel [[Golden Cove]] CPU cores & [[Gracemont (microarchitecture)|Gracemont]] small CPU cores |
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**New instruction set extensions:<ref>https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf</ref> |
**New instruction set extensions:<ref>https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf</ref> |
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*** CLDEMOTE |
*** CLDEMOTE |
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Revision as of 10:46, 3 October 2020
| General information | |
|---|---|
| Marketed by | Intel |
| Designed by | Intel |
| Common manufacturer | |
| Architecture and classification | |
| Technology node | 10 nanometer |
| Instructions | x86-64 |
| History | |
| Predecessor | Mobile: Tiger Lake Desktop: Rocket Lake |
| Successor | Meteor Lake |
Alder Lake is Intel's codename for the 12th generation of Intel Core processors based on a hybrid architecture utilizing Golden Cove big cores and Gracemont small cores.[1] Intel expects to launch Alder Lake in the second half of 2021. It is expected to use the 10nm SuperFin process and a new LGA 1700 socket[2] with DDR5 support.
Architecture changes in comparison with Tiger Lake
CPU
- Intel Golden Cove CPU cores & Gracemont small CPU cores
- New instruction set extensions:[3]
- CLDEMOTE
- PTWRITE
- User Wait: TPAUSE, UMONITOR, UMWAIT
- Architectural LBRs
- HLAT
- SERIALIZE
- AVX-VNNI
- Enhanced Hardware Feedback Interface (EHFI) and HRESET
- New instruction set extensions:[3]
GPU
I/O
References
- ^ https://www.anandtech.com/show/15979/intel-alder-lake-confirmed-x86-hybrid-with-golden-cove-and-gracemont-for-2021
- ^ Subramaniam, Vaidyanathan. "Intel 12th gen Alder Lake-S will use a larger LGA 1700 socket that may last for three generations". Notebookcheck.
- ^ https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
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