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Connection Machine

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This is the current revision of this page, as edited by Asalewski (talk | contribs) at 14:56, 12 December 2024 ("External links" section: update revision 1262411616 by Cosmia Nebula (talk) to preserve still-alive external link, but also provide pre-emptive archive of the content for CM-5 manuals. I just verified that the external link https://people.csail.mit.edu/bradley/cm5docs/ is still alive, but perhaps it was temporarily offline earlier.). The present address (URL) is a permanent link to this version.

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Connection Machine
A Connection Machine CM-2 (1987) and accompanying DataVault on display at the Computer Museum of America in Roswell, Georgia. The CM-2 used the same casing as the CM-1.
Design
ManufacturerThinking Machines Corporation
Release date
  • 1986 (CM-1)
  • 1987 (CM-2)
  • 1991 (CM-5)
Units soldAt least 70[1][2]
Casing
Dimensions≈ 6 feet cubed (CM-1 and CM-2)
Weight575.0 kg (CM-2)[1]
System
CPUUp to 65,536 1-bit processors (CM-1 and CM-2)
Memory
Storage
FLOPS
  • 2.5 GigaFLOPS (CM-2)
  • 65.5 GigaFLOPS (FROSTBURG CM-5)

The Connection Machine (CM) is a member of a series of massively parallel supercomputers sold by Thinking Machines Corporation. The idea for the Connection Machine grew out of doctoral research on alternatives to the traditional von Neumann architecture of computers by Danny Hillis at Massachusetts Institute of Technology (MIT) in the early 1980s. Starting with CM-1, the machines were intended originally for applications in artificial intelligence (AI) and symbolic processing, but later versions found greater success in the field of computational science.

Origin of idea

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Danny Hillis and Sheryl Handler founded Thinking Machines Corporation (TMC) in Waltham, Massachusetts, in 1983, moving in 1984 to Cambridge, MA. At TMC, Hillis assembled a team to develop what would become the CM-1 Connection Machine, a design for a massively parallel hypercube-based arrangement of thousands of microprocessors, springing from his PhD thesis work at MIT in Electrical Engineering and Computer Science (1985).[3] The dissertation won the ACM Distinguished Dissertation prize in 1985,[4] and was presented as a monograph that overviewed the philosophy, architecture, and software for the first Connection Machine, including information on its data routing between central processing unit (CPU) nodes, its memory handling, and the programming language Lisp applied in the parallel machine.[3][5] Very early concepts contemplated just over a million processors, each connected in a 20-dimensional hypercube,[6] which was later scaled down.

Designs

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Thinking Machines Connection Machine models
1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994
Custom architecture RISC-based (SPARC)
Entry CM-2a
Mainstream CM-1 CM-2 CM-5 CM-5E
Hi-end CM-200
expansions
Storage DataVault
Thinking Machines CM-2 at the Computer History Museum in Mountain View, California. One of the face plates has been partly removed to show the circuit boards inside.

Each CM-1 microprocessor has its own 4 kilobits of random-access memory (RAM), and the hypercube-based array of them was designed to perform the same operation on multiple data points simultaneously, i.e., to execute tasks in single instruction, multiple data (SIMD) fashion. The CM-1, depending on the configuration, has as many as 65,536 individual processors, each extremely simple, processing one bit at a time. CM-1 and its successor CM-2 take the form of a cube 1.5 meters on a side, divided equally into eight smaller cubes. Each subcube contains 16 printed circuit boards and a main processor called a sequencer. Each circuit board contains 32 chips. Each chip contains a router, 16 processors, and 16 RAMs. The CM-1 as a whole has a 12-dimensional hypercube-based routing network (connecting the 212 chips), a main RAM, and an input-output processor (a channel controller). Each router contains five buffers to store the data being transmitted when a clear channel is not available. The engineers had originally calculated that seven buffers per chip would be needed, but this made the chip slightly too large to build. Nobel Prize-winning physicist Richard Feynman had previously calculated that five buffers would be enough, using a differential equation involving the average number of 1 bits in an address. They resubmitted the design of the chip with only five buffers, and when they put the machine together, it worked fine. Each chip is connected to a switching device called a nexus. The CM-1 uses Feynman's algorithm for computing logarithms that he had developed at Los Alamos National Laboratory for the Manhattan Project. It is well suited to the CM-1, using as it did, only shifting and adding, with a small table shared by all the processors. Feynman also discovered that the CM-1 would compute the Feynman diagrams for quantum chromodynamics (QCD) calculations faster than an expensive special-purpose machine developed at Caltech.[7][8]

To improve its commercial viability, TMC launched the CM-2 in 1987, adding Weitek 3132 floating-point numeric coprocessors and more RAM to the system. Thirty-two of the original one-bit processors shared each numeric processor. The CM-2 can be configured with up to 512 MB of RAM, and a redundant array of independent disks (RAID) hard disk system, called a DataVault, of up to 25 GB. Two later variants of the CM-2 were also produced, the smaller CM-2a with either 4096 or 8192 single-bit processors, and the faster CM-200.

The light panels of FROSTBURG, a CM-5, on display at the National Cryptologic Museum. The panels were used to check the usage of the processing nodes, and to run diagnostics.

Due to its origins in AI research, the software for the CM-1/2/200 single-bit processor was influenced by the Lisp programming language and a version of Common Lisp, *Lisp (spoken: Star-Lisp), was implemented on the CM-1. Other early languages included Karl Sims' IK and Cliff Lasser's URDU. Much system utility software for the CM-1/2 was written in *Lisp. Many applications for the CM-2, however, were written in C*, a data-parallel superset of ANSI C.

With the CM-5, announced in 1991, TMC switched from the CM-2's hypercubic architecture of simple processors to a new and different multiple instruction, multiple data (MIMD) architecture based on a fat tree network of reduced instruction set computing (RISC) SPARC processors. To make programming easier, it was made to simulate a SIMD design. The later CM-5E replaces the SPARC processors with faster SuperSPARCs. A CM-5 was the fastest computer in the world in 1993 according to the TOP500 list, running 1024 cores with Rpeak of 131.0 GFLOPS, and for several years many of the top 10 fastest computers were CM-5s.[9]

Visual design

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The CM-5 LED panels could show randomly generated moving patterns that served purely as eye candy, as seen in Jurassic Park.

Connection Machines were noted for their striking visual design. The CM-1 and CM-2 design teams were led by Tamiko Thiel.[10] The physical form of the CM-1, CM-2, and CM-200 chassis was a cube-of-cubes, referencing the machine's internal 12-dimensional hypercube network, with the red light-emitting diodes (LEDs), by default indicating the processor status, visible through the doors of each cube.

By default, when a processor is executing an instruction, its LED is on. In a SIMD program, the goal is to have as many processors as possible working the program at the same time – indicated by having all LEDs being steady on. Those unfamiliar with the use of the LEDs wanted to see the LEDs blink – or even spell out messages to visitors. The result is that finished programs often have superfluous operations to blink the LEDs.

The CM-5, in plan view, had a staircase-like shape, and also had large panels of red blinking LEDs. Prominent sculptor-architect Maya Lin contributed to the CM-5 design.[11]

Surviving examples

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Permanent exhibits

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Past exhibits, Museum collections

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Private collections

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  • As of 2007, a preserved CM-2a was owned by the Corestore, a type of online-only museum.[20]
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A CM-5 was featured in the film Jurassic Park in the control room for the island (instead of a Cray X-MP supercomputer as in the novel). Two banks, one bank of 4 Units and a single off to the right of the set could be seen in the control room.[21]

The computer mainframes in Fallout 3 were inspired heavily by the CM-5. [22]

Cyberpunk 2077 features numerous CM-1/CM-2 style units in various portions of the game.

The b-side to Clock DVA's 1989 single "The Hacker" is titled "The Connection Machine" in reference to the CM-1.

See also

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References

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  1. ^ a b c "Swedish National Museum of Science and Technology, Parallelldator". Retrieved 25 October 2024.
  2. ^ "The Connection Machines CM-1 and CM-2". tamikothiel.com. Retrieved 24 October 2024.
  3. ^ a b Hillis, W. Daniel (1986). The Connection Machine. MIT Press. ISBN 0262081571.
  4. ^ "William Daniel Hillis - Award Winner". ACM Awards. Retrieved 30 April 2015.
  5. ^ Kahle, Brewster; Hillis, W. Daniel (1989). The Connection Machine Model CM-1 Architecture (Technical report). Cambridge, MA: Thinking Machines Corp. p. 7 pp. Retrieved 25 April 2015.
  6. ^ Hillis, W. Daniel (1989a). "Richard Feynman and the Connection Machine". Physics Today. 42 (2): 78. Bibcode:1989PhT....42b..78H. doi:10.1063/1.881196. Retrieved 30 June 2021.
  7. ^ Hillis, W. Daniel (1989b). "Richard Feynman and The Connection Machine". Physics Today. 42 (2). Institute of Physics: 78–83. Bibcode:1989PhT....42b..78H. doi:10.1063/1.881196. Archived from the original on 28 July 2009.
  8. ^ Hillis 1989a - Text of Daniel Hillis' Physics Today article on Feynman and the Connection machine; also a video of Hillis *How I met Feynman *Feynman's last days.
  9. ^ "November 1993". www.top500.org. Retrieved 16 January 2015.
  10. ^ Thiel, Tamiko (1994). "The Design of the Connection Machine". Design Issues. 10 (1): 5–18. doi:10.2307/1511650. ISSN 0747-9360.
  11. ^ "Bloodless Beige Boxes: The Story of an Artist and a Thinking Machine". IT History Society. 2 September 2014. Retrieved 16 January 2015.
  12. ^ "Computer History Museum, Catalog Search Connection Machine supercomputer". Retrieved 16 August 2019.
  13. ^ "Computer Museum of America". Retrieved 16 August 2019.
  14. ^ "File:Thinking Machines CM200-IMG 7294 (bright).jpg". Thinking Machines Connection Machine CM-200 supercomputer. On display at the Musée Bolo, EPFL, Lausanne.
  15. ^ "Museum of Modern Art, CM-2 Supercomputer". Retrieved 25 October 2024.
  16. ^ "National Museum of American History - CM-1 Rack". Retrieved 25 October 2024.
  17. ^ "National Museum of American History - Search Collections". Retrieved 25 October 2024.
  18. ^ "Tamiko Thiel: The Connection Machine CM-1/CM-2, Artificial intelligence parallel supercomputer design". Retrieved 25 October 2024.
  19. ^ "Pushing Boundaries: Ingenuity from the Paul G. Allen Collection". Retrieved 25 October 2024.
  20. ^ "Corestore collection: Connection Machine CM-2a". Retrieved 25 October 2024.
  21. ^ Movie Quotes Database
  22. ^ Linus Tech Tips

Further reading

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  • Hillis, D. 1982 "New Computer Architectures and Their Relationship to Physics or Why CS is No Good", Int J. Theoretical Physics 21 (3/4) 255-262.
  • Lewis W. Tucker, George G. Robertson, "Architecture and Applications of the Connection Machine," Computer, vol. 21, no. 8, pp. 26–38, August, 1988.
  • Arthur Trew and Greg Wilson (eds.) (1991). Past, Present, Parallel: A Survey of Available Parallel Computing Systems. New York: Springer-Verlag. ISBN 0-387-19664-1
  • Charles E. Leiserson, Zahi S. Abuhamdeh, David C. Douglas, Carl R. Feynman, Mahesh N. Ganmukhi, Jeffrey V. Hill, W. Daniel Hillis, Bradley C. Kuszmaul, Margaret A. St. Pierre, David S. Wells, Monica C. Wong, Shaw-Wen Yang, and Robert Zak. "The Network Architecture of the Connection Machine CM-5". Proceedings of the fourth annual ACM Symposium on Parallel Algorithms and Architectures. 1992.
  • W. Daniel Hillis and Lewis W. Tucker. The CM-5 Connection Machine: A Scalable Supercomputer. In Communications of the ACM, Vol. 36, No. 11 (November 1993).
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Records
Preceded by
NEC SX-3/44
20.0 gigaflops
World's most powerful supercomputer
Thinking Machines CM-5/1024

June 1993
Succeeded by
Numerical Wind Tunnel
124.0 gigaflops