Logarithmic resistor ladder

A Logarithmic resistor ladder is an electronic circuit composed of a series of resistors and switches, designed to create an attenuation from an input to an output signal, where the logarithm of the attenuation ratio is proportional to a digital code word that represents the state of the switches.

The logarithmic behavior of the circuit is its main differentiator in comparison with digital-to-analog converters in general, and traditional R-2R Ladder networks specifically. Logarithmic attenuation is desired in situations where a large dynamic range needs to be handled. The circuit described in this article is applied in audio devices, since human perception of sound level is properly expressed on a logarithmic scale.

Logarithmic input/output behavior

As in DA converters, a binary word is applied to the ladder network, whose N bits are treated to represent an integer value according the relation:

$CodeValue=\sum _{i=1}^{N}sw_{i}\cdot 2^{i-1}$ where $sw_{i}$ represents a value 0 or 1 depending on the state of the i^th switch.

For a conventional DAC or R-2R network, the output signal value (its voltage) would be:

$V_{out}=a\cdot (CodeValue+b)\cdot V_{in}$ where $a$ and $b$ are design constants and where $V_{in}$ typically is a constant reference voltage.

(DA-converters that are designed to handle a variable input voltage are termed multiplying DAC.)

In contrast, the logarithmic ladder network discussed in this article creates a behavior as:

$\log(V_{out}/V_{in})=a\cdot (CodeValue+b)$ where $V_{in}$ is a variable input signal.

Circuit implementation

This circuit is composed of 4 stages, numbered 1 to 4, and an additional leading Rsource and trailing Rload. Each stage i, has a designed input-to-output voltage attenuation ratio_i as:

$Ratio_{i}={\text{if}}\;sw_{i}\;{\text{then}}\;\alpha ^{2^{i-1}}\;{\text{else}}\;1$

For logarithmic scaled attenuators, it is common practice to express their attenuation in Decibels:

$dB(Ratio_{i})=20\log _{10}\alpha ^{2^{i-1}}=2^{i-1}\cdot 20\cdot \log _{10}\alpha$ for $i=1..N$ and $sw_{i}=1$

To show that this $Ratio_{i}$ satisfies the overall intention:

$\log(V_{out}/V_{in})=\log \prod _{i=1}^{N}Ratio_{i}=\sum _{i=1}^{N}\log(Ratio_{i})=a\cdot (CodeValue+b)$

for $b=0$ and $\alpha =2^{a}$

The different stages 1 .. N should function independently of each other, as to obtain 2^N different states with a composable behavior. To achieve an attenuation of each stage that is independent of its surrounding stages, either one of two design choices is to be implemented: constant input resistance or constant output resistance.

Constant input resistance

The input resistance of any stage shall be independent of its on/off switch position, and must be equal to R_load.

This leads to:

${\begin{cases}R_{i,parr}=(R_{i,b}\cdot R_{load})/(R_{i,b}+R_{load})\\R_{i,a}+R_{i,parr}=R_{load}\\R_{i,parr}/(R_{i,a}+R_{i,parr})=Ratio_{i}\end{cases}}$

With these equations, all resistor values of the circuit diagram follow easily after choosing values for N, $\alpha$ and R_load. (The value of R_source does not influence the logarithmic behavior)

Constant output resistance

The output resistance of any stage shall be independent of its on/off switch position, and must be equal to R_source.

This leads to:

${\begin{cases}R_{i,ser}=R_{i,a}+R_{source}\\R_{i,ser}\cdot R_{i,b}/(R_{i,ser}+R_{i,b})=R_{source}\\R_{i,b}/(R_{i,ser}+R_{i,b})=Ratio_{i}\end{cases}}$

Again, all resistor values of the circuit diagram follow easily after choosing values for N, $\alpha$ and R_source. (The value of R_load does not influence the logarithmic behavior)

Background

R-2R ladder networks used for Digital-to-Analog conversion are rather old. A historic description is in an 1955 patent.

Multiplying DA-converters with logarithmic behavior were not known for a long time after that. An initial approach was to map the logarithmic code to a much longer code word, which could be applied to the classical (linear) R-2R based DA-converter. Lenghtening the codeword is needed in that approach to achieve sufficient dynamic range. This approach was implemented in a device from Analog Devices inc., protected through a 1981 patent filing.

See also

• Resistor ladder: Explaining R-2R ladder networks.
• Digital-to-analog converter: Different methods to implement DA converters
• Attenuator circuits: Different circuit topologies for different purposes

External links

• Online calculator to configure logarithmic ladder networks