PowerPC 601
Appearance
You must add a |reason=
parameter to this Cleanup template – replace it with {{Cleanup|reason=<Fill reason here>}}
, or remove the Cleanup template.
The PowerPC 601 was the first generation of microprocessors to support a subset of the PowerPC instruction set. It was introduced at the same time as IBM POWER2 line of processors. Basically it a simpified and thus cheaper version of the RISC Single Chip (RSC) processor, with support for PowerPC instructions not in the POWER instruction set added. The PowerPC 601 was developed in co-operation of IBM, Motorola and Apple Computer.
Industry Target
Functional Layout
Execution Unit
Fixed Point Execution Unit
Floating Point Exection Unit
Bus Interface
Branch Processing Unit
Symmetric Multiprocessing
Memory Management Unit
Parametrics
Clock 50 MHz | 50 Mhz < ??? | ||
---|---|---|---|
Power | 6.5 W | 3.6 V @ 50MHz | |
Transistors | 2.8 million | ||
Gate | ??? | ??? | |
Gate oxide | ???? | ||
Metal-layer | pitch | thickness | |
M1 | ?? | ?? | |
M2 | ?? | ?? | |
M3 | ?? | ?? | |
M4 | ?? | ?? | |
Dielectric | ?? | ||
Vdd | ?? | ?? | |
Die Size | 10.95 mmX10.95 mm | ||
Package | 304pin QuadFlatPack(QFP) | ||
I/O | 184 Signals | ||
Frequiency | SPECint92 | SPECfp92 | |
66 MHz | >60 | >70 |
References
- PowerPC 601 Microprocessor, an IBM white paper on the 601