Talk:TRIAC
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| This is the talk page for discussing improvements to the TRIAC article. This is not a forum for general discussion of the article's subject. |
Article policies
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| Find sources: Google (books · news · scholar · free images · WP refs) · FENS · JSTOR · TWL |
| Archives: 1Auto-archiving period: 6 months |
Who and when invented TRIAC?
Who and when invented TRIAC? I have found relevant patent http://www.google.com/patents/US3504241 Are there any earlier patents? — Preceding unsigned comment added by 83.237.28.43 (talk) 17:11, 5 October 2013 (UTC)
- The linked patent shows 1967 as the patent date. I seriously doubt there is anything before that. —EncMstr (talk) 03:23, 12 April 2014 (UTC)
- Pt. No SU238016, first working samples were ready in 1962. Inventor: Vasilenko Valentina Stefanovna. First produced on "Electrostal" factory in Saransk, Russia. http://patents.su/4-238016-simmetrichnyjj-tiristor-s-tokom-upravleniya-lyubojj-polyarnosti.html — Preceding unsigned comment added by 46.188.49.203 (talk) 21:58, 3 January 2017 (UTC)
Gates
The details begin with "gate", and it appears as if there is only one gate at first. But then, in the descriptions and examples that follow, there suddenly appears to be two different gates - namely "gate 1" and "gate 2". So, the newcomers would be confused. How many gates are there for a triac? One? Two? Furthermore, the illustrations appear to be erroneous, in that the quadrant 3 diagram says "gate 2 negative", but the diagram currently has the "gate" on MT1 (Main Terminal 1). A similar issue for the quadrant 4 diagram, which says "gate 1 positive", but the "gate" is connected to MT2 according to the quadrant 4 diagram.
Those diagrams also shows four (not three) nodes. So why show four nodes when triacs are generally sold with three pins? — Preceding unsigned comment added by KorgBoy (talk • contribs) 09:33, 12 December 2016 (UTC)
I think I can help here. All of these devices have 4 or more layers and a nominal Cathode / Anode arrangement. In an SCR the "gate" is the base of one of the virtual transistors nearest the Cathode. In an SCS, both "gates", or the bases of both virtual transistors, is brought out at both the Anode and Cathode. In a PUT, the "gate" is the base of the virtual transistor nearest the Anode. In this case, there are two more PN junctions, creating two more virtual transistors as well as a fifth virtual transistor at the "gate". In the introductory schematics, the diagrams are the same, but inverted. The "gate" is the same terminal whether named "gate 1" or "gate 2". I'd recommend putting a caption on the diagrams in that section to clarify the inversion and removing the "1" and "2" from the "gate" designation. 50.247.247.81 (talk) 14:54, 19 September 2017 (UTC)
More citiations needed
This article is not cited well. It needs more citations and proof. Tombob51 (talk) 12:31, 7 November 2015 (UTC)
TRIAC patend
Hi to all, I found this link: http://patentimages.storage.googleapis.com/pdfs/US3275909.pdf US Patent 3 275 909 by Frank W. GUTZWILLER Filled on Dec./19/ 1963 Patented on Sept.27 1966 92.152.102.56 (talk) 15:14, 15 April 2017 (UTC)link found by Jacky THIELLIN -France [1]