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Apple Inc. has developed a range of "System on Chip" (SoC) as well as "System in Package" (SiP) processors for powering their mobile consumer devices and other tasks. To meet the stringent power and space constraints common to mobile devices, these chips combine a central processing unit (CPU) with other components into a single compact physical package. Johny Srouji is the executive in charge of Apple's silicon design.[1]

Early series

Prior to the introduction of the Apple "A" series of SoCs, Apple used several SoCs in early revisions of the iPhone and iPod touch. They were specified by Apple and manufactured by Samsung. They integrate a single ARM-based processing core (CPU), a graphics processing unit (GPU), and other electronics necessary to provide mobile computing functions within a single physical package.

The APL0098 (also 8900B[2] or S5L8900) is a package on package (PoP) system on a chip (SoC) that was introduced on June 29, 2007 at the launch of the original iPhone. It includes a 412 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It is manufactured by Samsung on a 90 nm process. The first generation iPod touch also used it.[3]

The APL0278[4] (also S5L8720) is a package on package (PoP) system on a chip (SoC) that was introduced on September 9, 2008 at the launch of the second generation iPod touch. It includes a 533 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It is manufactured by Samsung on a 65 nm process.[3]

The APL0298 (also S5L8920) is a package on package (PoP) system on a chip (SoC) that was introduced on June 8, 2009 at the launch of the iPhone 3GS. It includes a 600 MHz single-core Cortex-A8 CPU and a PowerVR SGX535 GPU. It is manufactured by Samsung on a 65 nm process.[5]

The APL2298 (also S5L8922) is a 45 nm die shrunk version of the iPhone 3GS SoC[3] and was introduced on September 9, 2009 at the launch of the third generation iPod touch.

A series

Evolution of Apple "A" series
A4
March 2010-September 2013
A5
March 2011-September 2016
A5X
March-October 2012
A6
September 2012-2015
A6X
October 2012-2013
March-October 2014
A7
September 2013-March 2017
A8
September 2014-present
A8X
October 2014-March 2017
A9
September 2015-2018
A9X
November 2015-June 2017
A10 Fusion
September 2016-present
A10X
June 2017-present
A11 Bionic
September 2017-present
A12 Bionic
September 2018-present
A12X Bionic
October 2018-present
Notes:

The Apple "A" series is a family of "Systems on Chip" (SoC) used in the iPhone, iPad, iPod touch, and Apple TV. They integrate one or more ARM-based processing cores (CPU), a graphics processing unit (GPU), cache memory and other electronics necessary to provide mobile computing functions within a single physical package. They are designed by Apple, and manufactured by Samsung and TSMC.

Apple A4

The Apple A4 is a package on package (PoP) system on a chip (SoC) designed by Apple Inc. and manufactured by Samsung.[6] It combines an ARM Cortex-A8 CPU with a PowerVR GPU, and emphasizes power efficiency.[7] The chip commercially debuted with the release of Apple's iPad tablet;[8] followed shortly by the iPhone 4 smartphone,[9] the 4th generation iPod touch and the 2nd generation Apple TV. It was superseded in the iPad 2, released the following year, by the Apple A5 processor.

Apple A4 is based on the ARM processor architecture.[10] The first version released ran at 1 GHz for the iPad[11] and contains an ARM Cortex-A8 CPU core paired with a PowerVR SGX 535 graphics processor (GPU)[8][12][13] built on Samsung's 45-nanometer (nm) silicon chip fabrication process.[3][14] The clock speed for the units used in the iPhone 4 and the iPod touch (4th generation) is 800 MHz. The clock speed for the unit used in the Apple TV has not been revealed.

The Cortex-A8 core used in the A4 is thought to use performance enhancements developed by chip designer Intrinsity (which was subsequently acquired by Apple)[15] in collaboration with Samsung.[16] The resulting core, dubbed "Hummingbird", is able to run at far higher clock rates than other implementations while remaining fully compatible with the Cortex-A8 design provided by ARM.[17] Other performance improvements include additional L2 cache. The same Cortex-A8 CPU core used in the A4 is also used in Samsung's S5PC110A01 SoC.[18][19] The SGX535 in the A4 could theoretically push 35 million polygons per second and 500 million pixels per second, although real world performance may be considerably less.[20]

The A4 processor package does not contain RAM, but supports PoP installation. Hence, there is a package with two low-power 128 MB DDR SDRAM chips (totaling 256 MB) mounted on top of the A4 used in the first-generation iPad, the fourth-generation iPod touch,[21] and the second-generation Apple TV.[22] The iPhone 4 has two 256 MB packages for a total of 512 MB.[23][24][25] The RAM is connected to the processor using ARM's 64-bit-wide AMBA 3 AXI bus. To support the iPad's demand for high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11 and ARM9 based Apple devices.[26]

Apple A5

The Apple A5 is a system on a chip (SoC) designed by Apple Inc. and manufactured by Samsung[27] that replaced the A4. The chip commercially debuted with the release of Apple's iPad 2 tablet in March 2011,[28] followed by its release in the iPhone 4S smartphone later that year. Apple claims that compared with its predecessor, the A4, the A5 CPU "can do twice the work" and the GPU has "up to nine times the graphics performance".[29]

The A5 contains a dual-core ARM Cortex-A9 CPU[30] with ARM's advanced SIMD extension, marketed as NEON, and a dual core PowerVR SGX543MP2 GPU. This GPU can push between 70 and 80 million polygons/second and has a pixel fill rate of 2 billion pixels/second. Apple lists the A5 to be clocked at 1 GHz on the iPad 2's technical specifications page,[31] though it can dynamically adjust its frequency to save battery life.[30][32] The clock speed of the unit used in the iPhone 4S is 800 MHz. Like the A4, the A5 process size is 45 nm.[33]

An updated 32 nm version of the A5 processor was used in the third generation Apple TV, the iPod touch (5th generation), the iPad Mini, and the new version of iPad 2 (version iPad2,4).[34] The chip in the Apple TV has one core locked.[35][36] The markings of the square package indicates that it is named APL2498, and in software, the chip is called S5L8942. The 32 nm variant of the A5 provides around 15% better battery life during web browsing, 30% better when playing 3D games and approximately 20% better battery life during video playback.[37]

In March 2013, Apple released an updated version of the third generation Apple TV (AppleTV3,2) containing a smaller, single-core version of the A5 processor. Unlike the other A5 variants, this version of the A5 is not a package-on-package (PoP), having no stacked RAM. The chip is very small, just 6.1×6.2 mm, but as the decrease in size is not due to a decrease in feature size (it is still on a 32 nm fabrication process), this indicates that this A5 revision is of a new design.[38] Markings tell that it is named APL7498, and in software, the chip is called S5L8947.[39][40]

Apple A5X

The Apple A5X is a system-on-a-chip (SoC) designed by Apple Inc. that was announced on March 7, 2012, at the launch of the third generation iPad. It is a high performance variant of the Apple A5; Apple claims it has twice the graphics performance of the A5.[41] It was superseded in the fourth generation iPad by the Apple A6X processor.

This SoC has a quad-core graphics unit (PowerVR SGX543MP4) instead of the previous dual-core as well as a quad-channel memory controller that provides a memory bandwidth of 12.8 GB/s, roughly three times more than in the A5. The added graphics cores and extra memory channels add up to a very large die size of 165 mm²,[42] for example twice the size of Nvidia Tegra 3.[43] This is mainly due to the large PowerVR SGX543MP4 GPU. The clock frequency of the dual ARM Cortex-A9 cores have been shown to operate at the same 1 GHz frequency as in A5.[44] The RAM in A5X is separate from the main CPU package.[45]

Apple A6

The Apple A6 is a package on package (PoP) system on a chip (SoC) designed by Apple that was introduced on September 12, 2012, at the launch of the iPhone 5, then a year later was inherited by its minor successor the iPhone 5C. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A5.[46] It is 22% smaller and draws less power than the 45 nm A5.[47]

The A6 is said to use a 1.3 GHz[48] custom[49] Apple-designed ARMv7 based dual-core CPU, called Swift,[50] rather than a licensed CPU from ARM like in previous designs, and an integrated 266 MHz triple-core PowerVR SGX 543MP3[51] graphics processing unit (GPU). The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the ARM Cortex-A15 such as support for the Advanced SIMD v2, and VFPv4.[49] The A6 is manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[52]

Apple A6X

Apple A6X is a system-on-a-chip (SoC) designed by Apple Inc., introduced at the launch of the fourth generation iPad on October 23, 2012. It is a high performance variant of the Apple A6. Apple claims the A6X has twice the CPU performance and up to twice the graphics performance of its predecessor, the Apple A5X.[53]

Like the A6, this SoC continues to use the dual-core Swift CPU, but it has a new quad core GPU, quad channel memory and slightly higher 1.4 GHz CPU clock rate.[54] It uses an integrated quad-core PowerVR SGX 554MP4 graphics processing unit (GPU) running at 300 MHz and a quad-channel memory subsystem.[54][55] Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[55]

Apple A7

The Apple A7 is a package on package (PoP) 64-bit system-on-a-chip (SoC) designed by Apple. Its first appearance was in the iPhone 5S, which was introduced on September 10, 2013. The chip would also be used in the iPad Air, iPad Mini 2 and iPad Mini 3. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A6.[56]

The A7 features an Apple-designed 1.3[57]–1.4[58] GHz 64-bit[59] ARMv8-A[60][61] dual-core CPU,[57] called Cyclone,[60] and an integrated PowerVR G6430 GPU in a four cluster configuration.[62] The ARMv8-A architecture doubles the number of registers of the A7 compared to the A6.[63] It now has 31 general purpose registers that are each 64-bits wide and 32 floating-point/NEON registers that are each 128-bits wide.[59] The A7 is manufactured by Samsung on a high-κ metal gate (HKMG) 28 nm process[64] and the chip includes over 1 billion transistors on a die 102 mm2 in size.[57]

Apple A8

The Apple A8 is a package on package (PoP) 64-bit system-on-a-chip (SoC) designed by Apple and manufactured by TSMC. Its first appearance was in the iPhone 6 and iPhone 6 Plus, which were introduced on September 9, 2014.[65] A year later it would drive the iPad Mini 4. Apple states that it has 25% more CPU performance and 50% more graphics performance while drawing only 50% of the power compared to its predecessor, the Apple A7.[66] On February 9, 2018 Apple released the HomePod, which is powered by an Apple A8 with 1 GB of RAM.[67]

The A8 features an Apple-designed 1.4[68] GHz 64-bit[69] ARMv8-A[69] dual-core CPU, and an integrated PowerVR GX6450 GPU in a four cluster configuration.[68] The A8 is manufactured on a 20 nm process[70] by TSMC,[71] which replaced Samsung as the manufacturer of Apple's mobile device processors. It contains 2 billion transistors. Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm2 (consistent with a shrink only, not known to be a new microarchitecture).[72]

Apple A8X

The Apple A8X is a 64-bit system on a chip (SoC) designed by Apple, introduced at the launch of the iPad Air 2 on October 16, 2014.[73] It is a high performance variant of the Apple A8. Apple states that it has 40% more CPU performance and 2.5 times the graphics performance of its predecessor, the Apple A7.[73][74]

Unlike the A8, this SoC uses a triple-core CPU, a new octa-core GPU, dual channel memory and slightly higher 1.5 GHz CPU clock rate.[75] It uses an integrated octa-core PowerVR GXA6850 graphics processing unit (GPU) running at 450 MHz and a dual-channel memory subsystem.[75] It is manufactured by TSMC on their 20 nm fabrication process, and consists of 3 billion transistors.

Apple A9

The Apple A9 is a 64-bit ARM based system on a chip (SoC) designed by Apple Inc. It first appeared in the iPhone 6S and 6S Plus, which were introduced on September 9, 2015.[76] Apple states that it has 70% more CPU performance and 90% more graphics performance compared to its predecessor, the Apple A8.[76] It is dual sourced, a first for an Apple SoC; it is manufactured by Samsung on their 14 nm FinFET LPE process and by TSMC on their 16 nm FinFET process. It was subsequently included in the iPhone SE, and the iPad (2017).

Apple A9X

The Apple A9X is a 64-bit system on a chip (SoC) designed by Apple Inc. It was announced on September 9, 2015, and released on November 11, 2015, and first appeared in the iPad Pro.[77] It offers 80% more CPU performance and two times the GPU performance of its predecessor, the Apple A8X. It is manufactured by TSMC using a 16 nm FinFET process.[78]

Apple A10 Fusion

The Apple A10 Fusion is a 64-bit ARM based system on a chip (SoC) designed by Apple Inc. It first appeared in the iPhone 7 and 7 Plus, which were introduced on September 7, 2016.[79] The A10 is also featured in the iPad (2018). It has a new quad core design with two high performance cores, and two smaller highly efficient cores. It is 40% faster than the A9, with 50% faster graphics. It is made by TSMC on their 16 nm FinFET process.

Apple A10X Fusion

The Apple A10X Fusion is a 64-bit ARM based system on a chip (SoC) designed by Apple Inc. It first appeared in the 10.5" iPad Pro and the second generation of the 12.9" iPad Pro, which were both announced on June 5, 2017.[80] It is a variant of the A10 and Apple claims that it has 30 percent faster CPU performance and 40 percent faster GPU performance than its predecessor, the A9X.[80] On September 12, 2017, Apple announced that the Apple TV 4K would be powered by a A10X chip. It is made by TSMC on their 10 nm FinFET process.[81]

Apple A11 Bionic

The Apple A11 Bionic is a 64-bit ARM-based system on a chip (SoC), designed by Apple Inc.[82] It first appeared in the iPhone 8, iPhone 8 Plus, and iPhone X which were introduced on September 12, 2017.[82] It has two high-performance cores which are 25% faster than the A10 Fusion and four high-efficiency cores which are 70% faster than the energy-efficient cores in the A10.[82][83]

Apple A12 Bionic

The Apple A12 Bionic is a 64-bit ARM-based system on a chip (SoC) designed by Apple Inc. It first appeared in the iPhone XS, XS Max and XR which were introduced on September 12, 2018. It has two high-performance cores which are 15% faster than the A11 Bionic and four high-efficiency cores which are 50% lower power usage than the energy-efficient cores in the A11 Bionic.[84] The A12 is manufactured by TSMC[85] using a 7 nm[86] FinFET process, the first to ship in a smartphone.[87][85]

Apple A12X Bionic

The Apple A12X Bionic is a 64-bit ARM-based system on a chip (SoC) designed by Apple Inc. It first appeared in the 11.0" iPad Pro and the third generation of the 12.9" iPad Pro, which were both announced on October 30, 2018.[88] It offers 35% faster single-core and 90% faster multi-core CPU performance than its predecessor, the A10X. It has four high-performance cores and four high-efficiency cores. The A12X is manufactured by TSMC using a 7 nm FinFET process, the first to ship in a tablet.

S series

The Apple "S" series is a family of "Systems in Package" (SiP) used in the Apple Watch. It uses a customized application processor that together with memory, storage and support processors for wireless connectivity, sensors and I/O comprise a complete computer in a single package. They are designed by Apple, and manufactured by contract manufacturers such as Samsung.

Apple S1

The Apple S1 is an integrated computer designed by Apple. It includes memory, storage and support circuits like wireless modems and I/O controllers in a sealed integrated package. It was announced on September 9, 2014 as part of the "Wish we could say more" event. Its first appearance was in the original Apple Watch.[89]

Apple S1P

Used in Apple Watch Series 1. It has a dual-core processor almost identical to the S2, with the exception of the built-in GPS receiver.

Apple S2

Used in the Apple Watch Series 2. It has a dual-core processor and a built-in GPS receiver.

Apple S3

Used in the Apple Watch Series 3. It has a dual-core processor that is 70% faster than the Apple S2 and a built-in GPS receiver.[90] There is also an option for a cellular modem and an internal eSIM module.[90] It also includes the W2 chip.[90]

Apple S4

Used in the Apple Watch Series 4. It has an Apple designed custom 64-bit dual-core processor with up to 2x faster performance. It also contains the W3 wireless chip, which supports Bluetooth 5.

W series

The Apple "W" series is a family of "System on Chip" (SoC) and wireless chips with a focus on Bluetooth and Wi-Fi connectivity.

Apple W1

The Apple W1 is a SoC from Apple used in the AirPods and select Beats headphones.[91][92] It maintains a Bluetooth[93] Class 1 connection with a computer device and decodes the audio stream that is sent to it.[94]

Apple W2

The Apple W2 is a wireless chip from Apple used in the Apple Watch Series 3. It is integrated into the Apple S3 SiP. Apple released that the implementation of the chip makes Wi-Fi 85% faster and Bluetooth and Wi-Fi 50% more power efficient than the previous model's chip design.[90]

Apple W3

The Apple W3 is a wireless chip from Apple used in the Apple Watch Series 4.[95][96] It is integrated into the Apple S4 SiP. It supports Bluetooth 5.0.

T series

Apple T1

The Apple T1 chip is an ARMv7 SoC from Apple driving the System Management Controller (SMC) and Touch ID sensor of the 2016 and 2017 MacBook Pro with Touch Bar.[97] In addition to the traditional tasks of the SMC, this chip operates as a secure enclave for the processing and encryption of fingerprints as well as acting as a gatekeeper to the microphone and FaceTime HD camera protecting these possible targets from potential hacking attempts. The T1 runs bridgeOS,[98] a variant of watchOS,[98] separate from the Intel CPU running macOS.[98]

Apple T2

The Apple T2 chip is a SoC from Apple first released in the iMac Pro 2017. It is a 64-bit ARMv8 chip (a variant of the A10, or T8010), and runs a separate operating system called bridgeOS 2.0[99], which is a watchOS derivative.[100] It provides a secure enclave for encrypted keys, gives users the ability to lock down the computer's boot process, handles system functions like the camera and audio control, and handles on-the-fly encryption and decryption for the solid-state drive.[101][102][103] T2 also delivers "enhanced imaging processing" for the iMac Pro's FaceTime HD camera.[104][105] On July 12, 2018, Apple released an updated MacBook Pro that includes the T2 chip, which among other things enables the "Hey Siri" feature.[106][107] On November 7, 2018, Apple released an updated Mac mini and MacBook Air with the T2 chip.[108][109]

List of Apple processors

A series

Name Model no. Image Semiconductor technology Die size #Transistors CPU ISA CPU CPU cache GPU Memory technology Introduced Utilizing devices
APL0098 90 nm[5] 72 mm2[3] ARMv6 412 MHz single-core ARM11 L1i: 16 KB
L1d: 16 KB
PowerVR MBX Lite 16-bit Single-channel 133 MHz LPDDR (533 MB/sec)[110] June 2007
APL0278 65 nm[3] 36 mm2[3] ARMv6 412–533 MHz single-core ARM11 L1i: 16 KB
L1d: 16 KB
PowerVR MBX Lite 32-bit Single-channel 133 MHz LPDDR (1066 MB/sec) September 2008
APL0298 65 nm[5] 71.8 mm2[14] ARMv7 600 MHz single-core Cortex-A8 L1i: 32 KB
L1d: 32 KB
L2: 256 KB
PowerVR SGX535 32-bit Single-channel 200 MHz LPDDR (1.6 GB/sec) June 2009
APL2298 45 nm[3] 41.6 mm2[3] ARMv7 600–800 MHz single-core Cortex-A8 L1i: 32 KB
L1d: 32 KB
L2: 256 KB
PowerVR SGX535 32-bit Single-channel 200 MHz LPDDR (1.6 GB/sec) September 2009
A4 APL0398 45 nm[3][14] 53.3 mm2[3][14] ARMv7 0.8–1.0 GHz single-core Cortex-A8 L1i: 32 KB
L1d: 32 KB
L2: 512 KB
PowerVR SGX535[111] 32-bit Dual-channel 200 MHz LPDDR (3.2 GB/sec) March 2010
A5 APL0498 45 nm[33] 122.2 mm2[33] ARMv7 0.8–1.0 GHz dual-core Cortex-A9 L1i: 32 KB
L1d: 32 KB
L2: 1 MB
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[112] 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/sec) March 2011
APL2498 32 nm HKMG[34] 69.6 mm2[34] 0.8–1.0 GHz dual-core Cortex-A9 (one core locked in Apple TV) L1i: 32 KB
L1d: 32 KB
L2: 1 MB
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[112] 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/sec) March 2012
APL7498 32 nm HKMG[40] 37.8 mm2[40] Single-core Cortex-A9 L1i: 32 KB
L1d: 32 KB
L2: 1 MB
PowerVR SGX543MP2 (dual-core) @ 200 MHz (12.8 GFLOPS)[112] 32-bit Dual-channel 400 MHz LPDDR2-800 (6.4 GB/sec) March 2013
A5X APL5498 45 nm[42] 165 mm2[42] ARMv7 1.0 GHz dual-core Cortex-A9 L1i: 32 KB
L1d: 32 KB
L2: 1 MB
PowerVR SGX543MP4 (quad-core) @ 200 MHz (25 GFLOPS)[112] 32-bit Quad-channel 400 MHz LPDDR2-800[113] (12.8 GB/sec) March 2012
A6 APL0598 32 nm HKMG[52][114] 96.71 mm2[52][114] ARMv7s[115] 1.3 GHz[116] dual-core Swift[49] L1i: 32 KB
L1d: 32 KB
L2: 1 MB[117]
PowerVR SGX543MP3 (triple-core) @ 266 MHz (25.5 GFLOPS)[51] 32-bit Dual-channel 533 MHz LPDDR2-1066[118] (8.528 GB/sec) September 2012
A6X APL5598 32 nm HKMG[55] 123 mm2[55] ARMv7s[115] 1.4 GHz dual-core Swift[54] L1i: 32 KB
L1d: 32 KB
L2: 1 MB
PowerVR SGX554MP4 (quad-core) @ 266 MHz (68.1 GFLOPS)[54][119] 32-bit Quad-channel 533 MHz LPDDR2-1066 (17.1 GB/sec)[120] October 2012
A7 APL0698 28 nm HKMG[64] 102 mm2[59] ~1 billion ARMv8-A[60] 1.3 GHz[57] dual-core Cyclone[60] L1i: 64 KB
L1d: 64 KB
L2: 1 MB
L3: 4 MB[60] (Inclusive)[121]
PowerVR G6430 (quad-core) @ 450 MHz (115.2 GFLOPS)[62][119] 64-bit Single-channel 800 MHz LPDDR3-1600[69] (12.8 GB/sec)[122] September 2013
APL5698 28 nm HKMG[123] 102 mm2[59][123] ~1 billion 1.4 GHz[58] dual-core Cyclone[60] L1i: 64 KB
L1d: 64 KB
L2: 1 MB
L3: 4 MB[58] (Inclusive)[121]
PowerVR G6430 (quad-core) @ 450 MHz (115.2 GFLOPS)[119] 64-bit Single-channel 800 MHz LPDDR3-1600[69] (12.8 GB/sec)[122] October 2013
A8 APL1011 20 nm (TSMC)[69] 89 mm2[124] ~2 billion ARMv8-A[68] 1.1–1.5 GHz dual-core Typhoon[68][125] L1i: 64 KB
L1d: 64 KB
L2: 1 MB
L3: 4 MB[68] (Inclusive)[121]
PowerVR GX6450 (quad-core)[126][127] @ ~533 MHz (136.5 GFLOPS) 64-bit Single-channel 800 MHz LPDDR3-1600[69] (12.8 GB/sec)[122] September 2014
A8X APL1012 20 nm (TSMC)[75][128] 128 mm2[75] ~3 billion ARMv8-A 1.5 GHz triple-core Typhoon[75][125] L1i: 64 KB
L1d: 64 KB
L2: 2 MB
L3: 4 MB[75] (Inclusive)[121]
PowerVR GXA6850 (octa-core)[75][128] @ ~450 MHz (230.4 GFLOPS) 64-bit Dual-channel 800 MHz LPDDR3-1600[75] (25.6 GB/sec)[122] October 2014
A9 APL0898 14 nm FinFET (Samsung)[129] 96 mm2[130] >2 billion ARMv8-A 1.85 GHz dual-core Twister[131][132] L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: 4 MB (Victim)[121][133]
PowerVR GT7600 (hexa-core)[134] @ ~600 MHz (230.4 GFLOPS) 64-bit Single-channel 1600 MHz LPDDR4-3200[132][133] (25.6 GB/sec)[132] September 2015
APL1022 16 nm FinFET (TSMC)[130] 104.5 mm2[130]
A9X APL1021 16 nm FinFET (TSMC)[135] 143.9 mm2[135][81] >3 billion ARMv8-A 2.16–2.26 GHz dual-core Twister[136][137] L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: none[121][135]
PowerVR 7XT Series (dodeca-core)[135] @ ~533 MHz (409.3 GFLOPS) 64-bit Dual-channel 1600 MHz LPDDR4-3200 (51.2 GB/sec) November 2015
A10 Fusion APL1W24 16 nm FinFET (TSMC)[138] 125 mm2[138] 3.3 billion ARMv8-A 2.34 GHz quad-core (2x Hurricane + 2x Zephyr)[139] L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: 4 MB
PowerVR GT7600 Plus (hexa-core)[140][141] @ >650 MHz (>250 GFLOPS) 64-bit Single-channel 1600 MHz LPDDR4 (25.6 GB/sec) September 2016
A10X Fusion APL1071[142] 10 nm FinFET (TSMC)[81] 96.4 mm2[81] ARMv8-A 2.36 GHz hexa-core (3x Hurricane + 3x Zephyr)[143] L1i: 64 KB
L1d: 64 KB
L2: 8 MB
L3: none[143]
PowerVR GT7600 Plus (dodeca-core)[80] 64-bit Dual-channel 1600 MHz LPDDR4[143][142] (51.2 GB/sec) June 2017
A11 Bionic APL1W72 10 nm FinFET (TSMC) 87.66 mm2[144] 4.3 billion ARMv8.2-A[145] 2.39 GHz hexa-core (2x Monsoon + 4x Mistral) L1i: 64 KB
L1d: 64 KB
L2: 8 MB
L3: none[146]
Apple Custom GPU (triple-core) 64-bit Single-channel 2133 MHz LPDDR4X[147][148] (34.1 GB/sec) September 2017
A12 Bionic APL1W81 7 nm FinFET (TSMC) 83.27 mm2[149] 6.9 billion ARMv8.3-A[150] 2.49 GHz hexa-core (2x Vortex + 4x Tempest)[151] L1i: 128 KB
L1d: 128 KB
L2: 8 MB
L3: none[152]
Apple Custom GPU (quad-core) 64-bit Single-channel 2133 MHz LPDDR4X[153][154] (34.1 GB/sec) September 2018
A12X Bionic APL1083 7 nm FinFET (TSMC) 10 billion ARMv8.3-A[150] 2.49 GHz octa-core (4x Vortex + 4x Tempest) L1i: 128 KB
L1d: 128 KB
L2: ? MB
L3: none
Apple Custom GPU (hepta-core) 64-bit Dual-channel 2133 MHz LPDDR4X (68.2 GB/sec) October 2018

S series

Name Model no. Image Semiconductor technology Die size CPU ISA CPU CPU cache GPU Memory technology Modem Introduced Utilizing devices
S1 APL0778[155] 28 nm HKMG[156][157] 32 mm2[156] ARMv7k[157][158] 520 MHz single-core Cortex-A7[157] L1d: 32 KB[157]
L2: 256 KB[157]
PowerVR Series 5[157][159] LPDDR3[160] April 2015
S1P TBC TBC TBC ARMv7k[161][162][163] 520 MHz dual-core Cortex-A7 without GPS[161] L1d: 64 KB[citation needed]
L2: 1 MB[citation needed]
PowerVR Series 6 'Rouge'[161] LPDDR3 September 2016
S2 TBC TBC TBC ARMv7k[161][162][163] 520 MHz dual-core Cortex-A7 with GPS[161] L1d: 64 KB[citation needed]
L2: 1 MB[citation needed]
PowerVR Series 6 'Rouge'[161] LPDDR3 September 2016
S3 Non-LTE and LTE TBC TBC TBC ARMv7k[164] Dual-core TBC TBC LPDDR4 Qualcomm MDM9635M (Snapdragon X7 LTE) September 2017
S4 Non-LTE and LTE TBC TBC TBC ARMv8-A ILP32[165][166] Dual-core TBC TBC TBC TBC September 2018

T series

Name Model no. Image Semiconductor technology Die size CPU ISA CPU CPU cache GPU Memory technology Introduced Utilizing devices
T1 APL1023[167] Apple T1 Processor ARMv7 TBD October 2016
T2 APL1027[168] Apple T2 Processor ARMv8-A TBD LPDDR4 December 2017

W series

Name Model no. Image Semiconductor technology Die size CPU ISA CPU CPU cache GPU Memory technology Bluetooth Introduced Utilizing devices
W1 343S00130[169]
343S00131[169]
Apple W1 chip TBC 14.3 mm2[169] TBC TBC TBC No GPU TBC 4.2 September 2016
W2 338S00348[170] Apple W2 chip TBC TBC TBC TBC TBC No GPU TBC 4.2 September 2017
W3 TBC TBC TBC TBC TBC TBC TBC No GPU TBC 5.0 September 2018

See also

Similar platforms

References

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Further reading