File:Hardware circular buffer implementation patent us3979733 fig4.png
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Summary
| Description |
English: This hardware circular buffer implementation shows the elements "read position counter", "write position counter", "adder + 1" and auxiliary circuitry like "selector" and "comparator". |
| Date | |
| Source | US patent 3979733 Digital data communications system packet switch, figure 4 |
| Author | Alexander Gibson Fraser (Bell Telephone Laboratories) |
Licensing
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This work is in the public domain in the United States because it is a work prepared by an officer or employee of the United States Government as part of that person’s official duties under the terms of Title 17, Chapter 1, Section 105 of the US Code.
Note: This only applies to original works of the Federal Government and not to the work of any individual U.S. state, territory, commonwealth, county, municipality, or any other subdivision. This template also does not apply to postage stamp designs published by the United States Postal Service since 1978. (See § 313.6(C)(1) of Compendium of U.S. Copyright Office Practices). It also does not apply to certain US coins; see The US Mint Terms of Use.
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 11:07, 15 December 2021 | | 2,784 × 1,676 (65 KB) | AndreAdrian | picture rotated for easier viewing |
| 10:09, 15 December 2021 |  | 2,320 × 3,408 (98 KB) | AndreAdrian | Uploaded a work by Alexander Gibson Fraser (Bell Telephone Laboratories) from US patent 3979733 Digital data communications system packet switch, figure 4 with UploadWizard |
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