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[[Image:Cray-1-deutsches-museum.jpg|thumb|A [[Cray-1]] supercomputer preserved at the [[Deutsches Museum]]]]
[[Image:Cray-1-deutsches-museum.jpg|thumb|A [[Cray-1]] supercomputer preserved at the [[Deutsches Museum]]]]
The '''history of [[supercomputing]]''' goes back to the 1960s when a series of computers at [[Control Data Corporation]] (CDC) were designed by [[Seymour Cray]] to use innovative designs and parallelism to achieve superior computational peak performance.<ref name=chen >''Hardware software co-design of a multimedia SOC platform'' by Sao-Jie Chen, Guang-Huei Lin, Pao-Ann Hsiung, Yu-Hen Hu 2009 ISBN pages 70-72 </ref> The [[CDC 6600]], released in 1964, is generally considered the first supercomputer.<ref>''History of computing in education'' by John Impagliazzo, John A. N. Lee 2004 ISBN 1-4020-8135-9 page 172 [http://books.google.com/books?id=J46GinHakmkC&pg=PA172&dq=history+of+supercomputer+cdc+6600&hl=en&ei=PeAcTv_eI8uf-wb3y9jvCA&sa=X&oi=book_result&ct=result&resnum=7&ved=0CEYQ6AEwBjgK#v=onepage&q=history%20of%20supercomputer%20cdc%206600&f=false]</ref><ref>''The American Midwest: an interpretive encyclopedia'' by Richard Sisson, Christian K. Zacher 2006 ISBN 0-253-34886-2 page 1489 [http://books.google.com/books?id=n3Xn7jMx1RYC&pg=PA1489&dq=history+of+supercomputer+cdc+6600&hl=en&ei=nt8cTo-RFc2r-gaDiPHLCA&sa=X&oi=book_result&ct=result&resnum=6&ved=0CEkQ6AEwBQ#v=onepage&q=history%20of%20supercomputer%20cdc%206600&f=false]</ref>
The '''history of supercomputing''' goes back to the 1960s when a series of computers at [[Control Data Corporation]] (CDC) were designed by [[Seymour Cray]] to use innovative designs and parallelism to achieve superior computational peak performance.<ref name=chen /> The [[CDC 6600]], released in 1964, is generally considered the first supercomputer.<ref>{{cite book | title= History of computing in education | first1= John | last1= Impagliazzo | first2= John A. N. | last2= Lee | year= 2004 | isbn = 1-4020-8135-9 | page = 172 | publisher= Springer |url =https://books.google.com/books?id=SzTTBwAAQBAJ&pg=PA172 | access-date= 20 February 2018}}</ref><ref>{{cite book |title= The American Midwest: an interpretive encyclopedia |first1= Richard |last1= Sisson |first2=Christian K. |last2= Zacher | year = 2006 | isbn = 0-253-34886-2 | page = 1489 |publisher= Indiana University Press | url = https://books.google.com/books?id=n3Xn7jMx1RYC&pg=PA1489 }}</ref> However, some earlier computers were considered supercomputers for their day such as the 1954 [[IBM Naval Ordnance Research Calculator|IBM NORC]] in the 1950s,<ref>{{cite web | url = http://www.columbia.edu/cu/computinghistory/norc.html | title = IBM NORC | author = Frank da Cruz | orig-year = 2004 | date = 25 October 2013 | access-date = 20 February 2018}}</ref> and in the early 1960s, the [[UNIVAC LARC]] (1960),<ref>{{cite book | first1=David E. | last1=Lundstrom | title=A Few Good Men from UNIVAC | publisher=MIT Press | year=1984 | isbn=9780735100107 | url=https://books.google.com/books?id=CK4LAAAACAAJ | access-date=20 February 2018}}</ref> the [[IBM 7030 Stretch]] (1962),<ref>David Lundstrom, ''A Few Good Men from UNIVAC'', page 90, lists LARC and STRETCH as supercomputers.</ref> and the [[Manchester computers|Manchester]] [[Atlas (computer)|Atlas]] (1962), all{{Specify|date=January 2024|reason=the NORC certainly wasn't}} of which were of comparable power.{{Citation needed|date=February 2024}}

In the 1970s, Cray formed his own company and using new approaches to machine architecture produced supercomputers which dominated the field until the end of the 1980s.


While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records.
While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records.


By the end of the 20th century, massively parallel supercomputers with thousands of "off-the-shelf" processors similar to those found in personal computers were constructed and broke through the [[teraflop]] computational barrier.
By the end of the 20th century, massively parallel supercomputers with thousands of "off-the-shelf" processors similar to those found in personal computers were constructed and broke through the [[FLOPS|teraFLOPS]] computational barrier.

Progress in the first decade of the 21st century was dramatic and supercomputers with over 60,000 processors appeared, reaching petaFLOPS performance levels.

==Beginnings: 1950s and 1960s==
The term "Super Computing" was first used in the ''[[New York World]]'' in 1929<ref>{{cite book |last=Eames |first=Charles |last2=Eames |first2=Ray |title=A Computer Perspective |year=1973 |publisher=Harvard University Press |location= Cambridge, Mass |pages = 95 }}. Page 95 identifies the article as {{cite news |title= Super Computing Machines Shown |publisher=New York World |date= March 1, 1920 }}. However, the article shown on page 95 references the Statistical Bureau in Hamilton Hall, and an article at the Columbia Computing History web site states that such did not exist until 1929. See [http://www.columbia.edu/acis/history/packard.html The Columbia Difference Tabulator - 1931]</ref> to refer to large custom-built [[Tabulating machine|tabulator]]s that [[IBM]] had made for [[Columbia University]].<ref>{{cite web | url=http://www.columbia.edu/cu/computinghistory/statlab-clipping.jpg|title= ''Super Computing Machines Shown'' (in ''New York World'') | orig-year = 1920| access-date = 26 February 2024}}</ref>

In 1957, a group of engineers left [[Sperry Corporation]] to form [[Control Data Corporation]] (CDC) in [[Minneapolis]], Minnesota. [[Seymour Cray]] left Sperry a year later to join his colleagues at CDC.<ref name=chen >{{cite book | title = Hardware software co-design of a multimedia SOC platform | first1 = Sao-Jie | last1 = Chen | first2 = Guang-Huei | last2 = Lin | first3 = Pao-Ann | last3 = Hsiung | first4 = Yu-Hen | last4 = Hu | year = 2009 | isbn = 9781402096235 | pages = 70–72 | url = https://books.google.com/books?id=OXyo3om9ZOkC&pg=PA70 | publisher = [[Springer Science+Business Media]] | access-date = 20 February 2018}}</ref> In 1960, Cray completed the [[CDC 1604]], one of the first generation of commercially successful [[Transistor computer|transistorized]] computers and at the time of its release, the fastest computer in the world.<ref name=Hannan >{{cite book | title = Wisconsin Biographical Dictionary | first = Caryn | last = Hannan | year = 2008 | isbn = 978-1-878592-63-7 | pages = 83–84 | publisher = State History Publications | url = https://books.google.com/books?id=V08bjkJeXkAC&pg=PA83 | access-date = 20 February 2018}}</ref> However, the sole fully transistorized [[Harwell CADET]] was operational in 1951, and IBM delivered its commercially successful transistorized [[IBM 7090]] in 1959.


[[File:CDC 6600 introduced in 1964.jpg|thumb|left|The [[CDC 6600]] with the system console]]
Progress in first decade of the 21st century was dramatic and supercomputers with over 60,000 processors appeared, and reached [[petaflop]] performance levels.
Around 1960, Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers, Cray completed the [[CDC 6600]] in 1964. Cray switched from germanium to silicon transistors, built by [[Fairchild Semiconductor]], that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the [[speed of light]] restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.<ref name="The Supermen 1997">{{cite book | title = The Supermen | first = Charles J. | last = Murray | publisher = Wiley & Sons | year = 1997 | isbn = 9780471048855 | url = https://books.google.com/books?id=VsA86kiUkC0C}}</ref> The 6600 outperformed the industry's prior recordholder, the [[IBM 7030 Stretch]],{{clarify|reason=How did the Stretch compare to the Atlas, numbers anybody? (see talk page)|date=January 2022}} by a factor of three.<ref name=AcadBook>"Designed by Seymour Cray, the CDC 6600 was almost three times faster than the next fastest machine of its day, the IBM 7030 Stretch." {{cite book
|title=Making a World of Difference: Engineering Ideas into Reality
|url=https://books.google.com/books?isbn=0309312655 |isbn=978-0309312653
|publisher=National Academy of Engineering |date=2014}}</ref><ref>"In 1964 Cray's CDC 6600 replaced Stretch as the fastest computer on Earth." {{cite book
|title=Expert Systems, Knowledge Engineering for Human Replication
|url=https://books.google.com/books?isbn=1291595090 |isbn=978-1291595093 |last=Sofroniou |first=Andreas |date=2013| publisher=Lulu.com }}</ref> With performance of up to three&nbsp;[[FLOPS|megaFLOPS]],<ref>{{cite web
| url=http://www.extremetech.com/extreme/125271-the-history-of-supercomputers
| first1= Sebastian | last1=Anthony
| title=The History of Supercomputers
| date=April 10, 2012 |access-date= 2015-02-02
| website=ExtremeTech}}</ref><ref>{{cite web
| url=http://www.britannica.com/EBchecked/topic/899655/CDC-6600
|author=<!--Staff writer(s); no by-line.-->
| title=CDC 6600
| access-date=2015-02-02
| website=Encyclopædia Britannica}}</ref> it was dubbed a ''supercomputer'' and defined the supercomputing market when two hundred computers were sold at $9 million each.<ref name=Hannan /><ref>{{cite book | title = A history of modern computing | publisher = MIT Press | first = Paul E. | last = Ceruzzi | year = 2003 | isbn = 978-0-262-53203-7 | page = [https://archive.org/details/historyofmodernc00ceru_0/page/161 161] | url = https://archive.org/details/historyofmodernc00ceru_0 | url-access = registration | access-date = 20 February 2018}}</ref>


The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota [[FORTRAN]] compiler for the machine was developed by Liddiard and Mundstock at the [[University of Minnesota]] and with it the 6600 could sustain 500&nbsp;kiloflops on standard mathematical operations.<ref>{{cite journal | doi = 10.1145/361598.361914 | last =Frisch | first = Michael J. | date = December 1972 | title = Remarks on algorithm 352 [S22], algorithm 385 [S13], algorithm 392 [D3] | journal = Communications of the ACM | volume = 15 | issue = 12 | page = 1074| s2cid =6571977 | doi-access = free }}</ref> In 1968, Cray completed the [[CDC 7600]], again the fastest computer in the world.<ref name=Hannan /> At 36&nbsp;[[Hertz|MHz]], the 7600 had 3.6 times the [[clock rate|clock speed]] of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company.<ref name=Hannan /> Two years after his departure CDC delivered the [[CDC STAR-100|STAR-100]], which at 100&nbsp;megaflops was three times the speed of the 7600. Along with the [[TI Advanced Scientific Computer|Texas Instruments ASC]], the STAR-100 was one of the first machines to use [[vector processing]]⁠{{nowrap|{{px2}}{{mdash}}{{px2}}}}the idea having been inspired around 1964 by the [[APL (programming language)|APL programming language]].<ref>{{cite book | title = An Introduction to high-performance scientific computing | first = Lloyd Dudley | last = Fosdick | year = 1996 | isbn = 0-262-06181-3 | page = [https://archive.org/details/introductiontohi00fosd/page/418 418] | url = https://archive.org/details/introductiontohi00fosd | url-access = registration | publisher = MIT Press}}</ref><ref name=Hill41 />
==The beginnings: CDC in the 1960s==
In 1957 a group of engineers left [[Sperry Corporation]] to form [[Control Data Corporation]] (CDC) in [[Minneapolis]], MN. [[Seymour Cray]] left Sperry a year later to join his colleagues at CDC.<ref name=chen /> In 1960 Cray completed the [[CDC 1604]], the first [[solid state (electronics)|solid state]] computer, and the fastest computer in the world at a time when [[vacuum tubes]] were found in most large computers.<ref name=Hannan >''Wisconsin Biographical Dictionary'' by Caryn Hannan 2008 ISBN 1-878592-63-7 pages 83-84 [http://books.google.com/books?id=V08bjkJeXkAC&pg=PA83&dq=cdc+6600+7600+cray&hl=en&ei=7LMZTozDIInX8gP0xIkM&sa=X&oi=book_result&ct=result&resnum=1&ved=0CCgQ6AEwAA#v=onepage&q=cdc%206600%207600%20cray&f=false]</ref>


[[File:University of Manchester Atlas, January 1963.JPG|thumb|The University of Manchester [[Atlas (computer)|Atlas]] in January 1963.]]
[[Image:Personable Computer.jpg|thumb|left|180px|The [[CDC 6600]] with the system console]]
In 1956, a team at [[Manchester University]] in the United Kingdom began development of [[Manchester_computers#Muse_and_Atlas|MUSE]]⁠{{nowrap|{{px2}}{{mdash}}{{px2}}}}a name derived from [[microsecond]] {{nowrap|engine{{px2}}{{mdash}}{{px2}}}}with the aim of eventually building a computer that could operate at processing speeds approaching one&nbsp;microsecond per instruction, about one&nbsp;million [[instructions per second]].<ref>{{cite web |title=The Atlas |url=http://www.computer50.org/kgill/atlas/atlas.html |publisher=University of Manchester |access-date=21 September 2010 |url-status=dead |archive-url=https://web.archive.org/web/20120728105352/http://www.computer50.org/kgill/atlas/atlas.html |archive-date=28 July 2012 }}</ref> ''Mu'' (the name of the Greek letter ''μ'') is a prefix in the SI and other systems of units denoting a factor of 10<sup>−6</sup> (one millionth).
Around 1960 Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers Cray completed the [[CDC 6600]] in 1964. Cray switched from germanium to silicon transistors, built by [[Fairchild Semiconductor]], that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.<ref>''The Supermen'', Charles Murray, Wiley & Sons, 1997.</ref> Given that the 6600 outran all computers of the time by about 10 times, it was dubbed a ''supercomputer'' and defined the supercomputing market when one hundred computers were sold at $8 million each.<ref>''A history of modern computing'' by Paul E. Ceruzzi 2003 ISBN 978-0-262-53203-7 page 161 [http://books.google.com/books?id=x1YESXanrgQC&pg=PA161&dq=history+cdc+6600+dubbed+supercomputer&hl=en&ei=ALMZTvqbH8qs8QPWuvUH&sa=X&oi=book_result&ct=result&resnum=1&ved=0CCsQ6AEwAA#v=onepage&q&f=false]</ref><ref name=Hannan />


At the end of 1958, [[Ferranti#Computers|Ferranti]] agreed to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed [[Atlas (computer)|Atlas]], with the joint venture under the control of [[Tom Kilburn]]. The first Atlas was officially commissioned on 7&nbsp;December {{nowrap|1962{{px2}}{{mdash}}{{px2}}}}nearly three years before the Cray CDC 6600 supercomputer was {{nowrap|introduced{{px2}}{{mdash}}{{px2}}}}as one of the world's first [[supercomputer]]s. It was considered at the time of its commissioning to be the most powerful computer in the world, equivalent to four [[IBM 7094]]s. It was said that whenever Atlas went offline half of the United Kingdom's computer capacity was lost.<ref name=Lavington>{{cite book |last=Lavington |first=Simon Hugh |title=A History of Manchester Computers |year=1998 |edition=2 |publisher=The British Computer Society |location=Swindon |isbn=978-1-902505-01-5 |pages=41–52 |url=https://books.google.com/books?id=rVnxAAAAMAAJ}}</ref> The Atlas pioneered [[virtual memory]] and [[paging]] as a way to extend its working memory by combining its 16,384 words of primary [[magnetic-core memory|core memory]] with an additional 96K words of secondary [[drum memory]].<ref>{{citation | first = R. J. | last = Creasy | url = http://pages.cs.wisc.edu/~stjones/proj/vm_reading/ibmrd2505M.pdf | title = The Origin of the VM/370 Time-Sharing System | work = IBM Journal of Research & Development | volume = 25 | number = 5 | date = September 1981 | page = 486 }}</ref> Atlas also pioneered the [[Atlas Supervisor]], "considered by many to be the first recognizable modern [[operating system]]".<ref name=Lavington />
The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota [[FORTRAN]] compiler for the machine was developed by Liddiard and Mundstock at the [[University of Minnesota]] and with it the 6600 could sustain 500 kilo-FLOPS on standard mathematical operations.<ref>Frisch, Michael (Dec 1972). "Remarks on Algorithms". Communications of the ACM 15 (12): 1074.</ref> In 1968 Cray completed the [[CDC 7600]], again the fastest computer in the world.<ref name=Hannan /> At 36 MHz, the 7600 had about three and a half times the [[clock speed]] of the 6600, but ran significantly faster due to other technical innovations.
They only sold about 50 of the 7600s, not quite a failure.
Cray left CDC in 1972 to form his own company.<ref name=Hannan /> Two years after his departure CDC delivered the [[CDC STAR-100|STAR-100]] which at 100 megaflops was three times the speed of the 7600. Along with the [[Texas Instruments ASC]], the STAR-100 was one of the first machines to use [[vector processing]] - the idea having been inspired around 1964 by the [[APL programming language]].<ref>''An Introduction to high-performance scientific computing'' by Lloyd Dudley Fosdick 1996 ISBN 0-262-06181-3 page 418</ref><ref name=Hill41 />


==The Cray era: mid-1970s and 1980s==
==The Cray era: mid-1970s and 1980s==
[[File:Cray2.jpeg|thumb|A liquid cooled [[Cray-2]] supercomputer]]
[[File:Cray2.jpeg|thumb|A [[Fluorinert]]-cooled [[Cray-2]] supercomputer]]
Four years after leaving CDC, Cray delivered the 80 MHz [[Cray 1]] in 1976, and it became the most successful supercomputer in history.<ref name=Hill41 >''Readings in computer architecture'' by Mark Donald Hill, Norman Paul Jouppi, Gurindar Sohi 1999 ISBN 978-1-55860-539-8 page 41-48</ref><ref name=Edwin65 /> The Cray 1 used integrated circuits with two gates per chip and was a [[vector processor]] which introduced a number of innovations such as [[chaining (vector processing)|chaining]] in which scalar and vector registers generate interim results which can be used immediately, without additional memory references which reduce computational speed.<ref name=Tokhi >''Parallel computing for real-time signal processing and control'' by M. O. Tokhi, Mohammad Alamgir Hossain 2003 ISBN 978-1-85233-599-1 pages 201-202</ref> <ref>''The Supermen'', Charles Murray, Wiley & Sons, 1997.</ref>The [[Cray X-MP]] (designed by [[Steve Chen (computer engineer)|Steve Chen]]) was released in 1982 as a 105 MHz shared-memory [[Parallel computing|parallel]] [[vector processor]] with better chaining support and multiple memory pipelines. All three floating point pipelines on the XMP could operate simultaneously.<ref name=Tokhi />
Four years after leaving CDC, Cray delivered the 80&nbsp;MHz [[Cray-1]] in 1976, and it became the most successful supercomputer in history.<ref name=Hill41>{{cite book | title = Readings in computer architecture | first1 = Mark Donald | last1 = Hill |author-link2=Norman Jouppi | first2 = Norman Paul | last2 = Jouppi | first3 = Gurindar | last3 = Sohi | year = 1999 | isbn = 978-1-55860-539-8 | pages = 41–48| publisher = Gulf Professional }}</ref><ref name=Edwin65 /> The Cray-1, which used integrated circuits with two gates per chip, was a [[vector processor]]. It introduced a number of innovations, such as [[chaining (vector processing)|chaining]], in which scalar and vector registers generate interim results that can be used immediately, without additional memory references which would otherwise reduce computational speed.<ref name="The Supermen 1997"/><ref name=Tokhi >{{cite book | title = Parallel computing for real-time signal processing and control | url = https://archive.org/details/parallelcomputin00phdm | url-access = limited | first1 = M. O. | last1 = Tokhi | first2 = Mohammad Alamgir | last2 = Hossain | year = 2003 | isbn = 978-1-85233-599-1 | pages = [https://archive.org/details/parallelcomputin00phdm/page/n209 201]-202| publisher = Springer }}</ref> The [[Cray X-MP]] (designed by [[Steve Chen (computer engineer)|Steve Chen]]) was released in 1982 as a 105&nbsp;MHz shared-memory [[Parallel computing|parallel]] [[vector processor]] with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously.<ref name=Tokhi /> By 1983 Cray and Control Data were supercomputer leaders; despite its lead in the overall computer market, IBM was unable to produce a profitable competitor.<ref name="greenwald19830711">{{Cite magazine |last=Greenwald |first=John |date=1983-07-11 |title=The Colossus That Works |url=http://content.time.com/time/magazine/article/0,9171,949693-2,00.html |url-status=live |url-access=subscription | magazine=Time |archive-url=https://web.archive.org/web/20080514004334/http://www.time.com/time/magazine/article/0,9171,949693-2,00.html |archive-date=2008-05-14 |access-date=2019-05-18}}</ref>


The [[Cray-2]] released in 1985 was a 4 processor [[Computer cooling|liquid cooled]] computer totally immersed in a tank of [[Fluorinert]], which bubbled as it operated.<ref>''The Supermen'', Charles Murray, Wiley & Sons, 1997</ref> It could perform to 1.9 gigaflops and was the world's fastest until 1990 when [[ETA10|ETA-10G]] from CDC overtook it. The Cray 2 was a totally new design and did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory.<ref name=Tokhi /> The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.<ref name=MacKenzie >''Knowing machines: essays on technical change'' by Donald MacKenzie 1998 ISBN 0-262-63188-1 page 149-151</ref> That trend was partly responsible for a move away from the in-house, [[Cray Operating System]] to [[UNICOS]] based on [[Unix]].<ref name=MacKenzie />
The [[Cray-2]], released in 1985, was a four-processor [[Computer cooling|liquid cooled]] computer totally immersed in a tank of [[Fluorinert]], which bubbled as it operated.<ref name="The Supermen 1997" /> It reached 1.9&nbsp;gigaflops and was the world's fastest supercomputer, and the first to break the gigaflop barrier.<ref>Due to Soviet propaganda, it can be read sometimes that the Soviet supercomputer M13 was the first to reach the gigaflops barrier. Actually, the M13 construction began in 1984, but it was not operational before 1986. [https://www.computer-museum.ru/english/galglory_en/Rogachev.php Rogachev Yury Vasilievich, Russian Virtual Computer Museum]</ref> The Cray-2 was a totally new design. It did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory.<ref name=Tokhi /> The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.<ref name=MacKenzie >{{cite book | title = Knowing machines: essays on technical change | first = Donald | last = MacKenzie | year = 1998 | isbn = 0-262-63188-1 | pages = 149–151| publisher = MIT Press }}</ref> That trend was partly responsible for a move away from the in-house, [[Cray Operating System]] to [[UNICOS]] based on [[Unix]].<ref name=MacKenzie />


The [[Cray Y-MP]], also designed by Steve Chen, was released in 1988 as an improvement of the XMP and could have eight [[vector processors]] at 167 MHz with a peak performance of 333 megaflops per processor.<ref name=Tokhi /> In the late 1980s, Cray's experiment on the use of [[gallium arsenide]] semiconductors in the [[Cray-3]] did not succeed. Chen began to work on a [[MIMD|massively parallel]] computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.<ref name=Edwin65 >''Milestones in computer science and information technology'' by Edwin D. Reilly 2003 ISBN 1-57356-521-0 page 65</ref><ref>''The Supermen'', Charles Murray, Wiley & Sons, 1997</ref>
The [[Cray Y-MP]], also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight [[vector processor]]s at 167&nbsp;MHz with a peak performance of 333&nbsp;megaflops per processor.<ref name=Tokhi /> In the late 1980s, Cray's experiment on the use of [[gallium arsenide]] semiconductors in the [[Cray-3]] did not succeed. Seymour Cray began to work on a [[Multiple instruction, multiple data|massively parallel]] computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.<ref name=Edwin65 >{{cite book | title = Milestones in computer science and information technology | url = https://archive.org/details/milestonesincomp0000reil | url-access = registration | first = Edwin D. | last = Reilly | year = 2003 | isbn = 1-57356-521-0 | page = [https://archive.org/details/milestonesincomp0000reil/page/65 65]| publisher = Bloomsbury Academic }}</ref><ref name="The Supermen 1997"/>


==Massive processing: the 1990s==
==Massive processing: the 1990s==
The [[Cray-2]] which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.
The [[Cray-2]] which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.


During the first half of the [[Strategic Computing Initiative]], some massively parallel architectures were proven to work, such as the [[WARP (systolic array)|WARP systolic array]], message-passing [[Multiple instruction, multiple data|MIMD]] like the [[Caltech Cosmic Cube|Cosmic Cube]] hypercube, [[Single instruction, multiple data|SIMD]] like the [[Connection Machine]], etc. In 1987, a TeraOPS Computing Technology Program was proposed, with a goal of achieving 1 teraOPS (a trillion operations per second) by 1992, which was considered achievable by scaling up any of the previously proven architectures.<ref>{{Cite book |last=Roland |first=Alex |title=Strategic computing: DARPA and the quest for machine intelligence, 1983 - 1993 |last2=Shiman |first2=Philip |date=2002 |publisher=MIT Press |isbn=978-0-262-18226-3 |series=History of computing |location=Cambridge, Mass. |pages=296}}</ref>
[[File:Paragon XP-E - mesh.jpg|thumb|left|180px|Rear of the [[Intel Paragon|Paragon]] cabinet showing the bus bars and mesh routers]]
The [[SX-3 supercomputer|SX-3/44R]] was announced by [[NEC Corporation]] in 1989 and a year later earned the fastest in the world title with a 4 processor model.<ref>''Computing methods in applied sciences and engineering'' by R. Glowinski, A. Lichnewsky ISBN 0-89871-264-5 page 353-360</ref> However, Fujitsu's [[Numerical Wind Tunnel]] supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor.<ref>[http://www.netlib.org/benchmark/top500/reports/report94/main.html TOP500 Annual Report 1994.]</ref><ref>{{Cite conference
|author=N. Hirose and M. Fukuda
|year=1997
|title=Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory
|conference=Proceedings of HPC-Asia '97
|publisher=IEEE Computer Society
|doi=10.1109/HPC.1997.592130
}}</ref> The [[Hitachi SR2201]] on the other hand obtained a peak performance of 600 gigaflops in 1996 by using 2048 processors connected via a fast three dimensional [[crossbar switch|crossbar]] network.<ref>H. Fujii, Y. Yasuda, H. Akashi, Y. Inagami, M. Koga, O. Ishihara, M. Kashiyama, H. Wada, T. Sumimoto, Architecture and performance of the Hitachi SR2201 massively parallel processor system, Proceedings of 11th International Parallel Processing Symposium, April 1997, Pages 233-241.</ref><ref>Y. Iwasaki, The CP-PACS project, Nuclear Physics B - Proceedings Supplements, Volume 60, Issues 1-2, January 1998, Pages 246-254.</ref><ref>A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.</ref>


[[File:Paragon XP-E - mesh.jpg|thumb|left|Rear of the [[Intel Paragon|Paragon]] cabinet showing the bus bars and mesh routers]]
In the same timeframe the [[Intel Paragon]] could have 1000 to 4000 [[Intel i860]] processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a [[MIMD]] machine which connected processors via a high speed two dimensional mesh, allowing processes to execute on separate nodes; communicating via the [[Message Passing Interface]].<ref>''Scalable input/output: achieving system balance'' by Daniel A. Reed 2003 ISBN 978-0-262-68142-1 page 182</ref> By 1995 Cray was also shipping massively parallel systems, e.g. the [[Cray T3E]] with over 2,000 processors, using a three dimensional [[torus interconnect]].<ref>''Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum'' Business Wire, Monday, August 7 2000 [http://www.allbusiness.com/electronics/computer-equipment-supercomputers/6484409-1.html]</ref><ref name=Torus >N. R. Agida et al. 2005 ''Blue Gene/L Torus Interconnection Network'', [[IBM Journal of Research and Development]], Vol 45, No 2/3 March-May 2005 page 265
The [[SX-3 supercomputer|SX-3/44R]] was announced by [[NEC Corporation]] in 1989 and a year later earned the fastest-in-the-world title with a four-processor model.<ref>{{cite book | title = Computing methods in applied sciences and engineering | first1 = R. | last1 = Glowinski | first2 = A. | last2 = Lichnewsky | date = January 1990 | isbn = 0-89871-264-5 | pages = 353–360}}</ref> However, Fujitsu's [[Numerical Wind Tunnel]] supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7&nbsp;gigaflops per processor.<ref>{{cite web | url = http://www.netlib.org/benchmark/top500/reports/report94/main.html | title = TOP500 Annual Report 1994 | date = 1 October 1996}}</ref><ref>{{Cite conference |first1=N. |last1= Hirose |first2= M. |last2= Fukuda |year=1997 |title=Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory |conference=Proceedings of HPC-Asia '97 |publisher=IEEE Computer Society |doi=10.1109/HPC.1997.592130}}</ref> The [[Hitachi SR2201]] obtained a peak performance of 600&nbsp;gigaflops in 1996 by using 2,048&nbsp;processors connected via a fast three-dimensional [[crossbar switch|crossbar]] network.<ref>{{cite conference | first1 = H. | last1 = Fujii | first2 = Y. | last2 = Yasuda | first3 = H. | last3 = Akashi | first4 = Y. | last4 = Inagami | first5 = M. | last5 = Koga | first6 = O. | last6 = Ishihara | first7 = M. | last7 = Kashiyama | first8 = H. | last8 = Wada | first9 = T. | last9 = Sumimoto | title = Architecture and performance of the Hitachi SR2201 massively parallel processor system |work = Proceedings of 11th International Parallel Processing Symposium | date = April 1997 | pages = 233–241 | doi = 10.1109/IPPS.1997.580901| isbn = 0-8186-7793-7 }}</ref><ref>{{cite journal | first = Y. | last = Iwasaki | title = The CP-PACS project | journal = Nuclear Physics B - Proceedings Supplements | volume = 60 | issue = 1–2 | date = January 1998 | pages = 246–254 | doi = 10.1016/S0920-5632(97)00487-8| arxiv = hep-lat/9709055 | bibcode = 1998NuPhS..60..246I }}</ref><ref>A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.</ref>
[http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf]</ref>


In the same timeframe the [[Intel Paragon]] could have 1,000 to 4,000 [[Intel i860]] processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a [[Multiple instruction, multiple data|MIMD]] machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the [[Message Passing Interface]].<ref>{{cite book | title = Scalable input/output: achieving system balance | first = Daniel A. | last = Reed | year = 2003 | isbn = 978-0-262-68142-1 | page = 182| publisher = MIT Press }}</ref> By 1995, Cray was also shipping massively parallel systems, e.g. the [[Cray T3E]] with over 2,000 processors, using a three-dimensional [[torus interconnect]].<ref>{{cite press release | title = Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum | agency = Business Wire | publisher = Gale Group | date = 7 August 2000 | url = https://www.thefreelibrary.com/Cray+Sells+First+T3E-1350+Supercomputer+to+Phillips+Petroleum.-a063900928 | location = Seattle }}</ref><ref name=Torus>{{cite journal|first=N. R.|last=Agida|collaboration = et al.|title=Blue Gene/L Torus Interconnection Network|journal=[[IBM Journal of Research and Development]]|volume=45|number=2–3|date=March–May 2005|page=265|url=http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |access-date=9 February 2012 |url-status=dead |archive-url=https://web.archive.org/web/20110815102821/http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |archive-date=15 August 2011 }}</ref>
The Paragon architecture soon led to the Intel [[ASCI Red]] supercomputer which held the top supercomputing spot to the end of the 20th century as part of the [[Advanced Simulation and Computing Initiative]]. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf [[Pentium Pro]] processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 [[teraflop]] barrier on the MP-[[Linpack]] benchmark in 1996; eventually reaching 2 teraflops.<ref>''Algorithms for parallel processing, Volume 105'' by Michael T. Heath 1998 ISBN 0-387-98680-4 page 323</ref>


The Paragon architecture soon led to the Intel [[ASCI Red]] supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the [[Advanced Simulation and Computing Initiative]]. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf [[Pentium Pro]] processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1&nbsp;teraflop barrier on the MP-[[Linpack]] benchmark in 1996; eventually reaching 2&nbsp;teraflops.<ref>{{cite journal | journal = Algorithms for Parallel Processing | title = Enabling Department-Scale Supercomputing | volume = 105 | first = David S. | last = Greenberg | editor-first = Michael T. | editor-last = Heath | year = 1998 | isbn = 0-387-98680-4 | page = 323 | url = https://books.google.com/books?id=zo61nbirb_gC&pg=PA323 | access-date = 20 February 2018}}</ref>
==Petaflop computing in the 21st century==

==Petascale computing in the 21st century==
{{Main|Petascale computing}}
{{Main|Petascale computing}}
[[Image:IBM Blue Gene P supercomputer.jpg|240px|thumb|A [[Blue Gene]]/P supercomputer at [[Argonne National Laboratory]]]]
[[Image:IBM Blue Gene P supercomputer.jpg|240px|thumb|A [[Blue Gene]]/P supercomputer at [[Argonne National Laboratory]]]]
Significant progress was made in the first decade of the 21st century and it was shown that the power of a large number of small processors can be harnessed to achieve high performance, e.g. as in [[System X (computing)|System X]]'s use of 1,100 Apple [[Power Mac G5]] computers quickly assembled in the summer of 2003 to gain 12.25 Teraflops.<ref>[http://top500.org/system/7286 TOP500]</ref><ref>Varadarajan, S. ''System X: building the Virginia Tech supercomputer '' in Proceedings. 13th International Conference on Computer Communications and Networks, 2004. ICCCN 2004. ISBN 0-7803-8814-3</ref>


The efficiency of supercomputers continued to increase, but not dramatically so. The [[Cray C90]] used 500 kilowatts of power in 1991, while by 2003 the [[ASCI Q]] used 3,000 kW while being 2,000 times faster, increasing the performance by watt 300 fold.<ref name=WuFeng >Wu-chun Feng, 2003 ''Making a Case for Efficient Supercomputing'' in ACM Queue Magazine, Volume 1 Issue 7, 10-01-2003 doi 10.1145/957717.957772 [http://sss.lanl.gov/pubs/031001-acmq.pdf]</ref>
Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The [[Cray C90]] used 500 kilowatts of power in 1991, while by 2003 the [[ASCI Q]] used 3,000&nbsp;kW while being 2,000 times faster, increasing the performance per watt 300 fold.<ref name=WuFeng>{{cite journal | first = Wu-chun | last = Feng | title = Making a Case for Efficient Supercomputing | journal = ACM Queue | volume = 1 | issue = 7 | date = 1 October 2003 | pages = 54–64 | doi = 10.1145/957717.957772 | s2cid = 11283177 | doi-access = free }}</ref>


In 2004 the [[Earth Simulator]] supercomputer built by [[NEC]] at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 131 teraflops, using 640 nodes, each with eight proprietary [[vector processing]] chips.<ref>{{cite journal
In 2004, the [[Earth Simulator]] supercomputer built by [[NEC]] at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9&nbsp;teraflops, using 640&nbsp;nodes, each with eight proprietary [[vector processor]]s.<ref>{{cite journal | first = Tetsuya | last = Sato | title = The Earth Simulator: Roles and Impacts | journal = Nuclear Physics B: Proceedings Supplements | page = 102 | volume = 129 | doi = 10.1016/S0920-5632(03)02511-8 | year = 2004| bibcode = 2004NuPhS.129..102S }}</ref>
| first = Tetsuya
| last = Sato
| title = The Earth Simulator: Roles and Impacts
| journal = Nuclear Physics B Proceedings Supplements
| pages = 102
| volume = 129
| doi = 10.1016/S0920-5632(03)02511-8
| year = 2004
}}</ref>


The [[IBM]] [[Blue Gene]] supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the [[TOP500]] list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.<ref>''Euro-Par 2005 parallel processing: 11th International Euro-Par Conference'' edited by José Cardoso Cunha, Pedro D. Medeiros 2005 ISBN 978-3-540-28700-1 pages 560-567</ref><ref>''IBM uncloaks 20 petaflops BlueGene/Q super'' [http://www.theregister.co.uk/2010/11/22/ibm_blue_gene_q_super/ The Register November 22, 2010]</ref>
The [[IBM]] [[Blue Gene]] supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the [[TOP500]] list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.<ref>{{cite conference | title = Early Experience with Scientific Applications on the Blue Gene/L Supercomputer | first = George | last = Almasi | collaboration = et al. | work = Euro-Par 2005 parallel processing: 11th International Euro-Par Conference | editor1-first = José Cardoso | editor1-last = Cunha | editor2-first = Pedro D. | editor2-last = Medeiros | year = 2005 | pages = 560–567 | isbn = 9783540319252 | url = https://books.google.com/books?id=RCEHCAAAQBAJ&pg=PA560}}</ref><ref>{{cite news | title = IBM uncloaks 20 petaflops BlueGene/Q super | url = https://www.theregister.co.uk/2010/11/22/ibm_blue_gene_q_super/ | work = The Register | date = 22 November 2010 | first = Timothy Prickett | last = Morgan}}</ref>


Progress in [[People's Republic of China|China]] has been rapid, in that China placed 51st on the [[TOP500]] list in June 2003, then 14th in November 2003 and 10th in June 2004 and then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop [[Tianhe-I]] supercomputer.<ref name=Graham >{{cite book | title = Getting up to speed: the future of supercomputing | first1 = Susan L. | last1 = Graham |first2 = Marc | last2 = Snir | first3 =Cynthia A. | last3 = Patterson | year = 2005 | isbn =0-309-09502-6 | page=188}}</ref><ref name=NYTimesTianhe >[http://www.nytimes.com/2010/10/28/technology/28compute.html?partner=rss&emc=rss New York Times]</ref>
Progress in [[China]] has been rapid, in that China placed 51st on the TOP500 list in June 2003; this was followed by 14th in November 2003, 10th in June 2004, then 5th during 2005, before gaining the top spot in 2010 with the 2.5&nbsp;petaflop [[Tianhe-I]] supercomputer.<ref name=Graham >{{cite book | title = Getting up to speed: the future of supercomputing | url = https://archive.org/details/gettinguptospeed00grah | url-access = limited | first1 = Susan L. | last1 = Graham |first2 = Marc | last2 = Snir | first3 =Cynthia A. | last3 = Patterson | year = 2005 | isbn =0-309-09502-6 | page=[https://archive.org/details/gettinguptospeed00grah/page/n204 188]| publisher = National Academies Press }}</ref><ref name=NYTimesTianhe >{{cite news | url = https://www.nytimes.com/2010/10/28/technology/28compute.html | title = China Wrests Supercomputer Title From U.S. | work = The New York Times | first = Ashlee | last = Vance |author-link=Ashlee Vance | date = 28 October 2010 | access-date = 20 February 2018}}</ref>


In July 2011 the 8.1 [[petaflop]] Japanese [[K computer]] became the fastest in the world using over 60,000 commercial [[scalar processor|scalar]] [[SPARC64 VIIIfx]] processors housed in over 600 cabinets. The fact that [[K computer]] is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world 7 years after holding the top spot demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.<ref name=tele20611>{{cite news|url=http://www.telegraph.co.uk/technology/news/8586655/Japanese-supercomputer-K-is-worlds-fastest.html|title=Japanese supercomputer 'K' is world's fastest|accessdate=20 June 2011|publisher=The Telegraph|date=20 June 2011}}</ref><ref name=nyt20611>{{cite news|url=http://www.nytimes.com/2011/06/20/technology/20computer.html|title=Japanese ‘K’ Computer Is Ranked Most Powerful|accessdate=20 June 2011|work=The New York Times|date=20 June 2011}}</ref><ref name=fujnr>{{cite web|url=http://www.fujitsu.com/global/news/pr/archives/month/2011/20110620-02.html|title=Supercomputer "K computer" Takes First Place in World|accessdate=20 June 2011|publisher=Fujitsu}}</ref>
In July 2011, the 8.1&nbsp;petaflop Japanese [[K computer]] became the fastest in the world, using over 60,000 [[SPARC64 V#SPARC64 VIIIfx|SPARC64 VIIIfx]] processors housed in over 600 cabinets. The fact that the K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot, demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.<ref name=tele20611>{{cite news|url=https://www.telegraph.co.uk/technology/news/8586655/Japanese-supercomputer-K-is-worlds-fastest.html|title=Japanese supercomputer 'K' is world's fastest|access-date=20 June 2011|work=The Telegraph|date=20 June 2011}}</ref><ref name=nyt20611>{{cite news|url=https://www.nytimes.com/2011/06/20/technology/20computer.html|title=Japanese 'K' Computer Is Ranked Most Powerful|access-date=20 June 2011|work=The New York Times|date=20 June 2011}}</ref><ref name=fujnr>{{cite web|url=http://www.fujitsu.com/global/news/pr/archives/month/2011/20110620-02.html|title=Supercomputer 'K computer' Takes First Place in World|access-date=20 June 2011|publisher=Fujitsu}}</ref> By 2014, the Earth Simulator had dropped off the list and by 2018 the K computer had dropped out of the top 10. By 2018, [[Summit (supercomputer)|Summit]] had become the world's most powerful supercomputer, at 200 petaFLOPS. In 2020, the Japanese once again took the top spot with the [[Fugaku (supercomputer)|Fugaku supercomputer]], capable of 442 PFLOPS. Finally, starting in 2022 and until the present ({{as of|December 2023|lc=y}}), the [[TOP500|world's fastest supercomputer]] had become the Hewlett Packard Enterprise [[Frontier (supercomputer)|Frontier]], also known as the OLCF-5 and hosted at the [[Oak Ridge Leadership Computing Facility]] (OLCF) in [[Tennessee]], United States. The Frontier is based on the [[Cray#Subsidiary of Hewlett Packard Enterprise: 2019–present|Cray EX]], is the world's first [[Exascale computing|exascale]] [[supercomputer]], and uses only [[AMD]] [[CPU]]s and [[GPU]]s; it achieved an [[LINPACK benchmarks#HPLinpack|Rmax]] of 1.102 [[FLOPS|exaFLOPS]], which is 1.102 quintillion operations per second.<ref>{{cite web |last1=Wells |first1=Jack |date=March 19, 2018 |title=Powering the Road to National HPC Leadership |url=https://www.youtube.com/watch?v=9tmWN9PR-ZU&t=2h24m41s |publisher=OpenPOWER Summit 2018 |access-date=March 25, 2018 |archive-date=August 4, 2020 |archive-url=https://web.archive.org/web/20200804004021/https://www.youtube.com/watch?v=9tmWN9PR-ZU&t=2h24m41s |url-status=live }}</ref><ref>{{cite web |last1=Bethea |first1=Katie |date=February 13, 2018 |title=Frontier: OLCF'S Exascale Future – Oak Ridge Leadership Computing Facility |url=https://www.olcf.ornl.gov/2018/02/13/frontier-olcfs-exascale-future/ |url-status=live |archive-url=https://web.archive.org/web/20180310203823/https://www.olcf.ornl.gov/2018/02/13/frontier-olcfs-exascale-future/ |archive-date=March 10, 2018 |website=Oak Ridge National Laboratory - Leadership Computing Facility}}</ref><ref>{{Cite web |date=October 9, 2020 |title=DOE Under Secretary for Science Dabbar's Exascale Update |url=https://insidehpc.com/2020/10/doe-under-secretary-for-science-dabbars-exascale-update-frontier-to-be-first-aurora-to-be-monitored/ |url-status=live |archive-url=https://web.archive.org/web/20201028093045/https://insidehpc.com/2020/10/doe-under-secretary-for-science-dabbars-exascale-update-frontier-to-be-first-aurora-to-be-monitored/ |archive-date=October 28, 2020 |website=insideHPC}}</ref><ref>{{cite news |author=Don Clark |date=May 30, 2022 |title=U.S. Retakes Top Spot in Supercomputer Race |work=The New York Times |url=https://www.nytimes.com/2022/05/30/business/us-supercomputer-frontier.html |access-date=June 1, 2022 |archive-date=June 1, 2022 |archive-url=https://web.archive.org/web/20220601230913/https://www.nytimes.com/2022/05/30/business/us-supercomputer-frontier.html |url-status=live }}</ref><ref>{{cite news |last1=Larabel |first1=Michael |title=AMD-Powered Frontier Supercomputer Tops Top500 At 1.1 Exaflops, Tops Green500 Too |url=https://www.phoronix.com/scan.php?page=news_item&px=Top500-Green500-Frontier |access-date=June 1, 2022 |website=[[Phoronix]] |date=May 30, 2022 |language=en |archive-date=June 6, 2022 |archive-url=https://web.archive.org/web/20220606064113/https://www.phoronix.com/scan.php?page=news_item&px=Top500-Green500-Frontier |url-status=live }}</ref>


==Historical TOP500 table==
==Historical TOP500 table==
{{Main list|List of fastest computers}}
This is a list of the computers which appeared at the top of the [[Top500]] list since 1993.<ref>{{cite web|author=Intel brochure - 11/91 |url=http://www.top500.org/sublist |title=Directory page for Top500 lists. Result for each list since June 1993 |publisher=Top500.org |date= |accessdate=2010-10-31}}</ref> The "Peak speed" is given as the "Rmax" rating.

This is a list of the computers which appeared at the top of the [[TOP500]] list since 1993.<ref>{{cite web |url=https://www.top500.org/statistics/sublist/ |title=Sublist Generator |publisher=Top500 |year=2017 |access-date=20 February 2018}}</ref> The "Peak speed" is given as the "Rmax" rating.


[[File:Supercomputers.png|thumb|300px|Exponential growth of supercomputers performance. See descriptions for details.]]
[[File:Supercomputers-history.svg|thumb|right|350px|Rapid growth of supercomputers performance, based on data from top500.org site. The logarithmic ''y''-axis shows performance in GFLOPS.
{{legend|DarkBlue|Combined performance of 500 largest supercomputers}}
{{legend|Red|Fastest supercomputer}}
{{legend|Yellow|Supercomputer in 500th place}}
]]
{| class="wikitable"
{| class="wikitable"
|-
|-
! Year !! Supercomputer !! [[FLOPS|Peak speed<br />(Rmax)]] !! Location
! Year !! Supercomputer !! [[FLOPS|Peak speed<br />(Rmax)]] !! Power efficiency<br />(GFLOPS per Watt) !! Location
|-
|-
|1993
|1993
|[[Fujitsu]] [[Numerical Wind Tunnel]]
|[[Fujitsu]] [[Numerical Wind Tunnel (Japan)|Numerical Wind Tunnel]]
|align=right|124.50&nbsp;GFLOPS
|align=right|124.50&nbsp;GFLOPS
|
|[[National Aerospace Laboratory of Japan|National Aerospace Laboratory]], [[Tokyo]], [[Japan]]
|[[National Aerospace Laboratory of Japan|National Aerospace Laboratory]], [[Tokyo]], [[Japan]]
|-
|-
Line 86: Line 97:
|[[Intel]] [[Intel Paragon|Paragon]] XP/S 140
|[[Intel]] [[Intel Paragon|Paragon]] XP/S 140
|align=right|143.40&nbsp;GFLOPS
|align=right|143.40&nbsp;GFLOPS
|
|[[Sandia National Laboratories|DoE-Sandia National Laboratories]], [[New Mexico]], [[United States|USA]]
|[[Sandia National Laboratories|DoE-Sandia National Laboratories]], [[New Mexico]], [[United States|USA]]
|-
|-
|1994
|1994
|[[Fujitsu]] [[Numerical Wind Tunnel]]
|[[Fujitsu]] [[Numerical Wind Tunnel (Japan)|Numerical Wind Tunnel]]
|align=right|170.40&nbsp;GFLOPS
|align=right|170.40&nbsp;GFLOPS
|
|[[National Aerospace Laboratory of Japan|National Aerospace Laboratory]], [[Tokyo]], [[Japan]]
|[[National Aerospace Laboratory of Japan|National Aerospace Laboratory]], [[Tokyo]], [[Japan]]
|-
|-
|rowspan="2"|1996
|rowspan="2"|1996
|[[Hitachi, Ltd.|Hitachi]] [[Hitachi SR2201|SR2201]]/1024
|[[Hitachi]] [[Hitachi SR2201|SR2201]]/1024
|align=right|220.4&nbsp;GFLOPS
|align=right|220.40&nbsp;GFLOPS
|
|[[University of Tokyo]], [[Japan]]
|[[University of Tokyo]], [[Japan]]
|-
|-
|[[Hitachi, Ltd.|Hitachi]] [[Hitachi SR2201|CP-PACS]]/2048
|[[Hitachi]] [[Hitachi SR2201|CP-PACS]]/2048
|align=right|368.2&nbsp;GFLOPS
|align=right|368.20&nbsp;GFLOPS
|
|[[University of Tsukuba]], [[Tsukuba]], [[Japan]]
|[[University of Tsukuba]], [[Tsukuba, Ibaraki|Tsukuba]], [[Japan]]
|-
|-
|1997
|1997
|[[Intel]] [[ASCI Red]]/9152
|[[Intel]] [[ASCI Red]]/9152
|align=right|1.338&nbsp;TFLOPS
|align=right|1.338&nbsp;TFLOPS
|
|rowspan="2" |[[Sandia National Laboratories|DoE-Sandia National Laboratories]], [[New Mexico]], [[United States|USA]]
|rowspan="2" |[[Sandia National Laboratories|DoE-Sandia National Laboratories]], [[New Mexico]], [[United States|USA]]
|-
|-
Line 110: Line 126:
|[[Intel]] [[ASCI Red]]/9632
|[[Intel]] [[ASCI Red]]/9632
|align=right|2.3796&nbsp;TFLOPS
|align=right|2.3796&nbsp;TFLOPS
|
|-
|-
|2000
|2000
|[[IBM]] [[ASCI White]]
|[[IBM]] [[ASCI White]]
|align=right|7.226&nbsp;TFLOPS
|align=right|7.226&nbsp;TFLOPS
|
|[[Lawrence Livermore National Laboratory|DoE-Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|[[Lawrence Livermore National Laboratory|DoE-Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|-
|-
|2002
|2002
|[[NEC Corporation|NEC]] [[Earth Simulator]]
|[[NEC Corporation|NEC]] [[Earth Simulator]]
|align=right|35.86&nbsp;TFLOPS
|align=right|35.860&nbsp;TFLOPS
|
|[[Earth Simulator Center]], [[Yokohama]], [[Japan]]
|[[Earth Simulator Center]], [[Yokohama]], [[Japan]]
|-
|-
|2004
|2004
|rowspan="4" |[[IBM]] [[Blue Gene|Blue Gene/L]]
|rowspan="4" |[[IBM]] [[Blue Gene|Blue Gene/L]]
|align=right|70.72&nbsp;TFLOPS <!-- Technically the same system as the two neighboring entries -->
|align=right|70.720&nbsp;TFLOPS <!-- Technically the same system as the two neighboring entries -->
|
|[[United States Department of Energy|DoE]]/[[IBM|IBM Rochester]], [[Minnesota]], [[United States|USA]]
|[[United States Department of Energy|DoE]]/[[IBM|IBM Rochester]], [[Minnesota]], [[United States|USA]]
|-
|-
|rowspan="2"|2005<!-- Technically the same system as the next two entries -->
|rowspan="2"|2005<!-- Technically the same system as the next two entries -->
|align=right|136.8&nbsp;TFLOPS <!-- Technically the same system as next two entries -->
|align=right|136.800&nbsp;TFLOPS <!-- Technically the same system as next two entries -->
|
|rowspan="3"|[[United States Department of Energy|DoE]]/[[United States National Nuclear Security Administration|U.S. National Nuclear Security Administration]],<br />[[Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|rowspan="3"|[[United States Department of Energy|DoE]]/[[National Nuclear Security Administration|U.S. National Nuclear Security Administration]],<br />[[Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|-
|-
|align=right|280.6&nbsp;TFLOPS <!-- upgrade of prior system -->
|align=right|280.600&nbsp;TFLOPS <!-- upgrade of prior system -->
|
|-
|-
||2007<!-- upgrade of prior system -->
||2007<!-- upgrade of prior system -->
|align=right|478.2&nbsp;TFLOPS <!-- upgrade of prior system -->
|align=right|478.200&nbsp;TFLOPS <!-- upgrade of prior system -->
|
|-
|-
|rowspan="2" |2008
|rowspan="2" |2008
|rowspan="2" |[[IBM]] [[IBM Roadrunner|Roadrunner]]
|rowspan="2" |[[IBM]] [[IBM Roadrunner|Roadrunner]]
|align=right|1.026&nbsp;PFLOPS
|align=right|1.026&nbsp;PFLOPS
|
|rowspan="2" |[[Los Alamos National Laboratory|DoE-Los Alamos National Laboratory]], [[New Mexico]], [[United States|USA]]
|rowspan="2" |[[Los Alamos National Laboratory|DoE-Los Alamos National Laboratory]], [[New Mexico]], [[United States|USA]]
|-
|-
|align=right|1.105&nbsp;PFLOPS
|align=right|1.105&nbsp;PFLOPS
|align=right|0.445
|-
|-
|2009
|2009
|[[Cray]] [[Jaguar (computer)|Jaguar]]
|[[Cray]] [[Jaguar (supercomputer)|Jaguar]]
|align=right|1.759&nbsp;PFLOPS
|align=right|1.759&nbsp;PFLOPS
|
|[[Oak Ridge National Laboratory|DoE-Oak Ridge National Laboratory]], [[Tennessee]], [[United States|USA]]
|[[Oak Ridge National Laboratory|DoE-Oak Ridge National Laboratory]], [[Tennessee]], [[United States|USA]]
|-
|-
Line 150: Line 176:
|[[Tianhe-I]]A
|[[Tianhe-I]]A
|align=right|2.566&nbsp;PFLOPS
|align=right|2.566&nbsp;PFLOPS
|align=right|0.635
|[[National Supercomputing Center]], [[Tianjin]], [[People's Republic of China|China]]
|[[Supercomputing in China|National Supercomputing Center]], [[Tianjin]], [[China]]
|-
|-
|2011
|2011
|[[Fujitsu]] [[K computer]]
|[[Fujitsu]] [[K computer]]
|align=right|10.51&nbsp;PFLOPS
|align=right|10.510&nbsp;PFLOPS
|align=right|0.825
|[[RIKEN]], [[Kobe]], [[Japan]]
|[[Riken]], [[Kobe]], [[Japan]]
|-
|-
|2012
|2012
|[[IBM Sequoia]]
|[[Sequoia (supercomputer)|IBM Sequoia]]
|align=right|16.32&nbsp;PFLOPS
|align=right|16.320&nbsp;PFLOPS
|
|[[Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|[[Lawrence Livermore National Laboratory]], [[California]], [[United States|USA]]
|-
|-
|2012
|2012
|[[Cray]] [[Titan (supercomputer)|Titan]]
|[[Cray]] [[Titan (supercomputer)|Titan]]
|align=right|17.59&nbsp;PFLOPS
|align=right|17.590&nbsp;PFLOPS
|
|[[Oak Ridge National Laboratory]], [[Tennessee]], [[United States|USA]]
|[[Oak Ridge National Laboratory]], [[Tennessee]], [[United States|USA]]
|-
|-
|2013
|[[National University of Defense Technology|NUDT]] [[Tianhe-2]]
|align=right|33.860&nbsp;PFLOPS
|align=right|2.215
|[[Guangzhou]], [[China]]
|-
|2016
|[[Sunway TaihuLight]]
|align=right|93.010&nbsp;PFLOPS
|align=right|6.051
|[[Wuxi]], [[China]]
|-
|2018
|[[Summit (supercomputer)|IBM Summit]]
|align=right|122.300&nbsp;PFLOPS
|align=right|14.668
|[[Oak Ridge National Laboratory|DoE-Oak Ridge National Laboratory]], [[Tennessee]], [[United States|USA]]
|-
|2020
|[[Fugaku (supercomputer)|Fugaku]]
|align=right|415.530&nbsp;PFLOPS
|align=right|15.418
|[[Riken]], [[Kobe]], [[Japan]]
|-
|2021
|[[Frontier_(supercomputer)|Frontier]]
|align=right|>1.1&nbsp;EFLOPS
|
|[[Oak Ridge Leadership Computing Facility]], [[Tennessee]], [[United States|USA]]
|-

<!-- Please do not add new computers unless they appear as #1 on the TOP500 list. See discussion page.-->
<!-- Please do not add new computers unless they appear as #1 on the TOP500 list. See discussion page.-->
|}
|}

==Export controls==
The [[CoCom]] and its later replacement, the [[Wassenaar Arrangement]], legally regulated, i.e. required licensing and approval and record-keeping; or banned entirely, the export of [[high-performance computer]]s (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.<ref>{{cite book | url = http://www.princeton.edu/~ota/disk1/1994/9408/940810.PDF | section = Complexities of Setting Export Control Thresholds: Computers | title = Export controls and nonproliferation policy | publisher = DIANE Publishing | isbn = 9781428920521 | date = May 1994}}</ref><ref>{{cite journal | first1 = Peter | last1 = Wolcott | first2 = Seymour | last2 = Goodman | first3 = Patrick | last3 = Homer | url = http://www.isqa.unomaha.edu/wolcott/Publications/vpcacm.htm | title = High Performance Computing Export Controls: Navigating Choppy Waters | journal = Communications of the ACM | date = November 1998 | volume = 41 | issue = 11 | pages = 27–30 | doi = 10.1145/287831.287836 | location = New York, USA| s2cid = 18519822 | doi-access = free }}</ref><ref>{{cite report | first1 = Glenn J. | last1 = McLoughlin | first2 = Ian F. | last2 = Fergusson | url = http://www.fas.org/sgp/crs/RL31175.pdf | title = High Performance Computers and Export Control Policy | date = 10 February 2003}}</ref><ref>{{cite web | first = Seth | last = Brugger | url = http://www.armscontrol.org/act/2000_09/exportsept00 | title = U.S. Revises Computer Export Control Regulations | date = 1 September 2000 | website = [[Arms Control Association]]}}</ref><ref>{{cite web | url = https://www.federalregister.gov/articles/2011/06/24/2011-15842/export-controls-for-high-performance-computers-wassenaar-arrangement-agreement-implementation-for | title = Export Controls for High Performance Computers | date = 24 June 2011}}</ref><ref>{{cite news | first = Jeff | last = Blagdon | url = https://www.theverge.com/2013/5/30/4381592/us-removes-sanctions-on-computer-exports-to-iran | title = US removes sanctions on computer exports to Iran | date = 30 May 2013}}</ref>


==See also==
==See also==
* {{Annotated link|FLOPS}}
* [[Linpack]]
* {{annotated link|Green500}}
* [[TOP500]]
* {{annotated link|Instructions per second}}
* [[Green 500]]
* [[Quasi-opportunistic supercomputing]]
* {{annotated link|Quasi-opportunistic supercomputing}}
* [[Supercomputer architecture]]
* [[Supercomputer architecture]]
* [[Supercomputing in China]]
* [[Supercomputing in China]]
Line 182: Line 246:
* [[Supercomputing in Pakistan]]
* [[Supercomputing in Pakistan]]


==References==
==External links==
*[https://www.computerhistory.org/visiblestorage/1960s-1980s/supercomputers/ Supercomputers (1960s-1980s)] at the [[Computer History Museum]]
{{Reflist|2}}


[[Category:Supercomputers]]
[[Category:Supercomputers]]
[[Category:History of computing hardware]]
[[Category:History of computing hardware|Supercomputing]]
[[Category:History of Silicon Valley|Supercomputing]]



[[ja:スーパーコンピュータ技術史]]
==References==
{{Reflist|2}}

Latest revision as of 02:20, 5 November 2024

A Cray-1 supercomputer preserved at the Deutsches Museum

The history of supercomputing goes back to the 1960s when a series of computers at Control Data Corporation (CDC) were designed by Seymour Cray to use innovative designs and parallelism to achieve superior computational peak performance.[1] The CDC 6600, released in 1964, is generally considered the first supercomputer.[2][3] However, some earlier computers were considered supercomputers for their day such as the 1954 IBM NORC in the 1950s,[4] and in the early 1960s, the UNIVAC LARC (1960),[5] the IBM 7030 Stretch (1962),[6] and the Manchester Atlas (1962), all[specify] of which were of comparable power.[citation needed]

While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records.

By the end of the 20th century, massively parallel supercomputers with thousands of "off-the-shelf" processors similar to those found in personal computers were constructed and broke through the teraFLOPS computational barrier.

Progress in the first decade of the 21st century was dramatic and supercomputers with over 60,000 processors appeared, reaching petaFLOPS performance levels.

Beginnings: 1950s and 1960s

[edit]

The term "Super Computing" was first used in the New York World in 1929[7] to refer to large custom-built tabulators that IBM had made for Columbia University.[8]

In 1957, a group of engineers left Sperry Corporation to form Control Data Corporation (CDC) in Minneapolis, Minnesota. Seymour Cray left Sperry a year later to join his colleagues at CDC.[1] In 1960, Cray completed the CDC 1604, one of the first generation of commercially successful transistorized computers and at the time of its release, the fastest computer in the world.[9] However, the sole fully transistorized Harwell CADET was operational in 1951, and IBM delivered its commercially successful transistorized IBM 7090 in 1959.

The CDC 6600 with the system console

Around 1960, Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers, Cray completed the CDC 6600 in 1964. Cray switched from germanium to silicon transistors, built by Fairchild Semiconductor, that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.[10] The 6600 outperformed the industry's prior recordholder, the IBM 7030 Stretch,[clarification needed] by a factor of three.[11][12] With performance of up to three megaFLOPS,[13][14] it was dubbed a supercomputer and defined the supercomputing market when two hundred computers were sold at $9 million each.[9][15]

The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota FORTRAN compiler for the machine was developed by Liddiard and Mundstock at the University of Minnesota and with it the 6600 could sustain 500 kiloflops on standard mathematical operations.[16] In 1968, Cray completed the CDC 7600, again the fastest computer in the world.[9] At 36 MHz, the 7600 had 3.6 times the clock speed of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company.[9] Two years after his departure CDC delivered the STAR-100, which at 100 megaflops was three times the speed of the 7600. Along with the Texas Instruments ASC, the STAR-100 was one of the first machines to use vector processingthe idea having been inspired around 1964 by the APL programming language.[17][18]

The University of Manchester Atlas in January 1963.

In 1956, a team at Manchester University in the United Kingdom began development of MUSEa name derived from microsecond enginewith the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million instructions per second.[19] Mu (the name of the Greek letter μ) is a prefix in the SI and other systems of units denoting a factor of 10−6 (one millionth).

At the end of 1958, Ferranti agreed to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed Atlas, with the joint venture under the control of Tom Kilburn. The first Atlas was officially commissioned on 7 December 1962nearly three years before the Cray CDC 6600 supercomputer was introducedas one of the world's first supercomputers. It was considered at the time of its commissioning to be the most powerful computer in the world, equivalent to four IBM 7094s. It was said that whenever Atlas went offline half of the United Kingdom's computer capacity was lost.[20] The Atlas pioneered virtual memory and paging as a way to extend its working memory by combining its 16,384 words of primary core memory with an additional 96K words of secondary drum memory.[21] Atlas also pioneered the Atlas Supervisor, "considered by many to be the first recognizable modern operating system".[20]

The Cray era: mid-1970s and 1980s

[edit]
A Fluorinert-cooled Cray-2 supercomputer

Four years after leaving CDC, Cray delivered the 80 MHz Cray-1 in 1976, and it became the most successful supercomputer in history.[18][22] The Cray-1, which used integrated circuits with two gates per chip, was a vector processor. It introduced a number of innovations, such as chaining, in which scalar and vector registers generate interim results that can be used immediately, without additional memory references which would otherwise reduce computational speed.[10][23] The Cray X-MP (designed by Steve Chen) was released in 1982 as a 105 MHz shared-memory parallel vector processor with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously.[23] By 1983 Cray and Control Data were supercomputer leaders; despite its lead in the overall computer market, IBM was unable to produce a profitable competitor.[24]

The Cray-2, released in 1985, was a four-processor liquid cooled computer totally immersed in a tank of Fluorinert, which bubbled as it operated.[10] It reached 1.9 gigaflops and was the world's fastest supercomputer, and the first to break the gigaflop barrier.[25] The Cray-2 was a totally new design. It did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory.[23] The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.[26] That trend was partly responsible for a move away from the in-house, Cray Operating System to UNICOS based on Unix.[26]

The Cray Y-MP, also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight vector processors at 167 MHz with a peak performance of 333 megaflops per processor.[23] In the late 1980s, Cray's experiment on the use of gallium arsenide semiconductors in the Cray-3 did not succeed. Seymour Cray began to work on a massively parallel computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.[22][10]

Massive processing: the 1990s

[edit]

The Cray-2 which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.

During the first half of the Strategic Computing Initiative, some massively parallel architectures were proven to work, such as the WARP systolic array, message-passing MIMD like the Cosmic Cube hypercube, SIMD like the Connection Machine, etc. In 1987, a TeraOPS Computing Technology Program was proposed, with a goal of achieving 1 teraOPS (a trillion operations per second) by 1992, which was considered achievable by scaling up any of the previously proven architectures.[27]

Rear of the Paragon cabinet showing the bus bars and mesh routers

The SX-3/44R was announced by NEC Corporation in 1989 and a year later earned the fastest-in-the-world title with a four-processor model.[28] However, Fujitsu's Numerical Wind Tunnel supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor.[29][30] The Hitachi SR2201 obtained a peak performance of 600 gigaflops in 1996 by using 2,048 processors connected via a fast three-dimensional crossbar network.[31][32][33]

In the same timeframe the Intel Paragon could have 1,000 to 4,000 Intel i860 processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a MIMD machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the Message Passing Interface.[34] By 1995, Cray was also shipping massively parallel systems, e.g. the Cray T3E with over 2,000 processors, using a three-dimensional torus interconnect.[35][36]

The Paragon architecture soon led to the Intel ASCI Red supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the Advanced Simulation and Computing Initiative. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf Pentium Pro processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-Linpack benchmark in 1996; eventually reaching 2 teraflops.[37]

Petascale computing in the 21st century

[edit]
A Blue Gene/P supercomputer at Argonne National Laboratory

Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The Cray C90 used 500 kilowatts of power in 1991, while by 2003 the ASCI Q used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.[38]

In 2004, the Earth Simulator supercomputer built by NEC at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary vector processors.[39]

The IBM Blue Gene supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the TOP500 list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.[40][41]

Progress in China has been rapid, in that China placed 51st on the TOP500 list in June 2003; this was followed by 14th in November 2003, 10th in June 2004, then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop Tianhe-I supercomputer.[42][43]

In July 2011, the 8.1 petaflop Japanese K computer became the fastest in the world, using over 60,000 SPARC64 VIIIfx processors housed in over 600 cabinets. The fact that the K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot, demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.[44][45][46] By 2014, the Earth Simulator had dropped off the list and by 2018 the K computer had dropped out of the top 10. By 2018, Summit had become the world's most powerful supercomputer, at 200 petaFLOPS. In 2020, the Japanese once again took the top spot with the Fugaku supercomputer, capable of 442 PFLOPS. Finally, starting in 2022 and until the present (as of December 2023), the world's fastest supercomputer had become the Hewlett Packard Enterprise Frontier, also known as the OLCF-5 and hosted at the Oak Ridge Leadership Computing Facility (OLCF) in Tennessee, United States. The Frontier is based on the Cray EX, is the world's first exascale supercomputer, and uses only AMD CPUs and GPUs; it achieved an Rmax of 1.102 exaFLOPS, which is 1.102 quintillion operations per second.[47][48][49][50][51]

Historical TOP500 table

[edit]

This is a list of the computers which appeared at the top of the TOP500 list since 1993.[52] The "Peak speed" is given as the "Rmax" rating.

Rapid growth of supercomputers performance, based on data from top500.org site. The logarithmic y-axis shows performance in GFLOPS.
  Combined performance of 500 largest supercomputers
  Fastest supercomputer
  Supercomputer in 500th place
Year Supercomputer Peak speed
(Rmax)
Power efficiency
(GFLOPS per Watt)
Location
1993 Fujitsu Numerical Wind Tunnel 124.50 GFLOPS National Aerospace Laboratory, Tokyo, Japan
1993 Intel Paragon XP/S 140 143.40 GFLOPS DoE-Sandia National Laboratories, New Mexico, USA
1994 Fujitsu Numerical Wind Tunnel 170.40 GFLOPS National Aerospace Laboratory, Tokyo, Japan
1996 Hitachi SR2201/1024 220.40 GFLOPS University of Tokyo, Japan
Hitachi CP-PACS/2048 368.20 GFLOPS University of Tsukuba, Tsukuba, Japan
1997 Intel ASCI Red/9152 1.338 TFLOPS DoE-Sandia National Laboratories, New Mexico, USA
1999 Intel ASCI Red/9632 2.3796 TFLOPS
2000 IBM ASCI White 7.226 TFLOPS DoE-Lawrence Livermore National Laboratory, California, USA
2002 NEC Earth Simulator 35.860 TFLOPS Earth Simulator Center, Yokohama, Japan
2004 IBM Blue Gene/L 70.720 TFLOPS DoE/IBM Rochester, Minnesota, USA
2005 136.800 TFLOPS DoE/U.S. National Nuclear Security Administration,
Lawrence Livermore National Laboratory, California, USA
280.600 TFLOPS
2007 478.200 TFLOPS
2008 IBM Roadrunner 1.026 PFLOPS DoE-Los Alamos National Laboratory, New Mexico, USA
1.105 PFLOPS 0.445
2009 Cray Jaguar 1.759 PFLOPS DoE-Oak Ridge National Laboratory, Tennessee, USA
2010 Tianhe-IA 2.566 PFLOPS 0.635 National Supercomputing Center, Tianjin, China
2011 Fujitsu K computer 10.510 PFLOPS 0.825 Riken, Kobe, Japan
2012 IBM Sequoia 16.320 PFLOPS Lawrence Livermore National Laboratory, California, USA
2012 Cray Titan 17.590 PFLOPS Oak Ridge National Laboratory, Tennessee, USA
2013 NUDT Tianhe-2 33.860 PFLOPS 2.215 Guangzhou, China
2016 Sunway TaihuLight 93.010 PFLOPS 6.051 Wuxi, China
2018 IBM Summit 122.300 PFLOPS 14.668 DoE-Oak Ridge National Laboratory, Tennessee, USA
2020 Fugaku 415.530 PFLOPS 15.418 Riken, Kobe, Japan
2021 Frontier >1.1 EFLOPS Oak Ridge Leadership Computing Facility, Tennessee, USA

Export controls

[edit]

The CoCom and its later replacement, the Wassenaar Arrangement, legally regulated, i.e. required licensing and approval and record-keeping; or banned entirely, the export of high-performance computers (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.[53][54][55][56][57][58]

See also

[edit]
[edit]


References

[edit]
  1. ^ a b Chen, Sao-Jie; Lin, Guang-Huei; Hsiung, Pao-Ann; Hu, Yu-Hen (2009). Hardware software co-design of a multimedia SOC platform. Springer Science+Business Media. pp. 70–72. ISBN 9781402096235. Retrieved 20 February 2018.
  2. ^ Impagliazzo, John; Lee, John A. N. (2004). History of computing in education. Springer. p. 172. ISBN 1-4020-8135-9. Retrieved 20 February 2018.
  3. ^ Sisson, Richard; Zacher, Christian K. (2006). The American Midwest: an interpretive encyclopedia. Indiana University Press. p. 1489. ISBN 0-253-34886-2.
  4. ^ Frank da Cruz (25 October 2013) [2004]. "IBM NORC". Retrieved 20 February 2018.
  5. ^ Lundstrom, David E. (1984). A Few Good Men from UNIVAC. MIT Press. ISBN 9780735100107. Retrieved 20 February 2018.
  6. ^ David Lundstrom, A Few Good Men from UNIVAC, page 90, lists LARC and STRETCH as supercomputers.
  7. ^ Eames, Charles; Eames, Ray (1973). A Computer Perspective. Cambridge, Mass: Harvard University Press. p. 95.. Page 95 identifies the article as "Super Computing Machines Shown". New York World. March 1, 1920.. However, the article shown on page 95 references the Statistical Bureau in Hamilton Hall, and an article at the Columbia Computing History web site states that such did not exist until 1929. See The Columbia Difference Tabulator - 1931
  8. ^ "Super Computing Machines Shown (in New York World)". Retrieved 26 February 2024.
  9. ^ a b c d Hannan, Caryn (2008). Wisconsin Biographical Dictionary. State History Publications. pp. 83–84. ISBN 978-1-878592-63-7. Retrieved 20 February 2018.
  10. ^ a b c d Murray, Charles J. (1997). The Supermen. Wiley & Sons. ISBN 9780471048855.
  11. ^ "Designed by Seymour Cray, the CDC 6600 was almost three times faster than the next fastest machine of its day, the IBM 7030 Stretch." Making a World of Difference: Engineering Ideas into Reality. National Academy of Engineering. 2014. ISBN 978-0309312653.
  12. ^ "In 1964 Cray's CDC 6600 replaced Stretch as the fastest computer on Earth." Sofroniou, Andreas (2013). Expert Systems, Knowledge Engineering for Human Replication. Lulu.com. ISBN 978-1291595093.
  13. ^ Anthony, Sebastian (April 10, 2012). "The History of Supercomputers". ExtremeTech. Retrieved 2015-02-02.
  14. ^ "CDC 6600". Encyclopædia Britannica. Retrieved 2015-02-02.
  15. ^ Ceruzzi, Paul E. (2003). A history of modern computing. MIT Press. p. 161. ISBN 978-0-262-53203-7. Retrieved 20 February 2018.
  16. ^ Frisch, Michael J. (December 1972). "Remarks on algorithm 352 [S22], algorithm 385 [S13], algorithm 392 [D3]". Communications of the ACM. 15 (12): 1074. doi:10.1145/361598.361914. S2CID 6571977.
  17. ^ Fosdick, Lloyd Dudley (1996). An Introduction to high-performance scientific computing. MIT Press. p. 418. ISBN 0-262-06181-3.
  18. ^ a b Hill, Mark Donald; Jouppi, Norman Paul; Sohi, Gurindar (1999). Readings in computer architecture. Gulf Professional. pp. 41–48. ISBN 978-1-55860-539-8.
  19. ^ "The Atlas". University of Manchester. Archived from the original on 28 July 2012. Retrieved 21 September 2010.
  20. ^ a b Lavington, Simon Hugh (1998). A History of Manchester Computers (2 ed.). Swindon: The British Computer Society. pp. 41–52. ISBN 978-1-902505-01-5.
  21. ^ Creasy, R. J. (September 1981), "The Origin of the VM/370 Time-Sharing System" (PDF), IBM Journal of Research & Development, vol. 25, no. 5, p. 486
  22. ^ a b Reilly, Edwin D. (2003). Milestones in computer science and information technology. Bloomsbury Academic. p. 65. ISBN 1-57356-521-0.
  23. ^ a b c d Tokhi, M. O.; Hossain, Mohammad Alamgir (2003). Parallel computing for real-time signal processing and control. Springer. pp. 201-202. ISBN 978-1-85233-599-1.
  24. ^ Greenwald, John (1983-07-11). "The Colossus That Works". Time. Archived from the original on 2008-05-14. Retrieved 2019-05-18.
  25. ^ Due to Soviet propaganda, it can be read sometimes that the Soviet supercomputer M13 was the first to reach the gigaflops barrier. Actually, the M13 construction began in 1984, but it was not operational before 1986. Rogachev Yury Vasilievich, Russian Virtual Computer Museum
  26. ^ a b MacKenzie, Donald (1998). Knowing machines: essays on technical change. MIT Press. pp. 149–151. ISBN 0-262-63188-1.
  27. ^ Roland, Alex; Shiman, Philip (2002). Strategic computing: DARPA and the quest for machine intelligence, 1983 - 1993. History of computing. Cambridge, Mass.: MIT Press. p. 296. ISBN 978-0-262-18226-3.
  28. ^ Glowinski, R.; Lichnewsky, A. (January 1990). Computing methods in applied sciences and engineering. pp. 353–360. ISBN 0-89871-264-5.
  29. ^ "TOP500 Annual Report 1994". 1 October 1996.
  30. ^ Hirose, N.; Fukuda, M. (1997). Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory. Proceedings of HPC-Asia '97. IEEE Computer Society. doi:10.1109/HPC.1997.592130.
  31. ^ Fujii, H.; Yasuda, Y.; Akashi, H.; Inagami, Y.; Koga, M.; Ishihara, O.; Kashiyama, M.; Wada, H.; Sumimoto, T. (April 1997). Architecture and performance of the Hitachi SR2201 massively parallel processor system. Proceedings of 11th International Parallel Processing Symposium. pp. 233–241. doi:10.1109/IPPS.1997.580901. ISBN 0-8186-7793-7.
  32. ^ Iwasaki, Y. (January 1998). "The CP-PACS project". Nuclear Physics B - Proceedings Supplements. 60 (1–2): 246–254. arXiv:hep-lat/9709055. Bibcode:1998NuPhS..60..246I. doi:10.1016/S0920-5632(97)00487-8.
  33. ^ A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.
  34. ^ Reed, Daniel A. (2003). Scalable input/output: achieving system balance. MIT Press. p. 182. ISBN 978-0-262-68142-1.
  35. ^ "Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum" (Press release). Seattle: Gale Group. Business Wire. 7 August 2000.
  36. ^ Agida, N. R.; et al. (et al.) (March–May 2005). "Blue Gene/L Torus Interconnection Network" (PDF). IBM Journal of Research and Development. 45 (2–3): 265. Archived from the original (PDF) on 15 August 2011. Retrieved 9 February 2012.
  37. ^ Greenberg, David S. (1998). Heath, Michael T. (ed.). "Enabling Department-Scale Supercomputing". Algorithms for Parallel Processing. 105: 323. ISBN 0-387-98680-4. Retrieved 20 February 2018.
  38. ^ Feng, Wu-chun (1 October 2003). "Making a Case for Efficient Supercomputing". ACM Queue. 1 (7): 54–64. doi:10.1145/957717.957772. S2CID 11283177.
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