Pentium (original): Difference between revisions
Appearance
Content deleted Content added
m moved P5 (microarchitecture) to Original Intel Pentium (P5 microarchitecture): See talk and other edit-summary. |
moved P5 (microarchitecture) to Original Intel Pentium (P5 microarchitecture): See talk and other edit-summary. |
||
Line 1: | Line 1: | ||
#REDIRECT [[Original Intel Pentium (P5 microarchitecture)]] |
|||
{{redirect|Intel Pentium|current processors marketed as Pentium|Pentium (brand)}} |
|||
{{Infobox Computer Hardware Cpu |
|||
| name = | image = KL_P1_Family.jpg |
|||
| caption = The Intel Pentium family |
|||
| produced-start = 1993 |
|||
| produced-end = 1999 |
|||
| slowest = 60 | slow-unit = MHz |
|||
| fastest = 300 | fast-unit = MHz |
|||
| fsb-slowest = 50 | fsb-slow-unit = MHz |
|||
| fsb-fastest = 66 | fsb-fast-unit = MHz |
|||
| manuf1 = Intel |
|||
| core1 = P5. P54, P54CS, P55C, Tillamook |
|||
| size-from = 0.8µm |
|||
| size-to = 0.25µm |
|||
| arch = x86 |
|||
| microarch = [[Intel P5|P5]] |
|||
| sock1 = Socket 4, Socket 5, Socket 7 |
|||
| numcores = 1 |
|||
}} |
|||
The original '''Pentium''' [[microprocessor]], introduced on March 22, 1993, was the first [[superscalar]] [[x86 architecture|x86 processor]].<ref>{{cite web |title=View Processors Chronologically by Date of Introduction: |url=http://www.intel.com/pressroom/kits/quickrefyr.htm#1993 |publisher=Intel |accessdate=2007-08-14}}</ref><ref>{{cite web |title=Intel Pentium Processor Family |url=http://www.intel.com/pressroom/kits/quickreffam.htm#pentium |publisher=Intel |accessdate=2007-08-14}}</ref> Its [[microarchitecture]] (sometimes called '''P5''') was a direct extension of the [[80486]] architecture and included dual [[integer]] [[pipeline (computing)|pipeline]]s, a faster [[Floating Point Unit|FPU]], wider [[data bus]], separate code and [[data cache]]s and features for further reduced address calculation latency. In 1996, the '''Pentium MMX''' was introduced with the same basic microarchitecture complemented with [[MMX (instruction set)|MMX]] instructions, larger caches, and some other enhancements. |
|||
The name Pentium [[Pentium (brand)#Origins|was derived]] from the [[Greek language|Greek]] ''pente'' (πέντε), meaning 'five', and the [[Latin]] ending ''[[Latin declension#Third declension i-stem nouns|-ium]]'', a name selected after [[Pentium (brand)#Origins of Pentium trademark|courts had disallowed]] trademarking of number-based names like "i586" or "80586". Intel filed a U.S. trademark for the name 'Pentium' on July 2, 1992, more than 8 months before the public release of the Intel Pentium chip with the description 'computer hardware; namely, microprocessors'.<ref>http://www.trademarkia.com/pentium-74291248.html</ref> In 1995, Intel started to employ the registered ''Pentium'' [[trademark]] also for x86 processors with [[X86#Chronology|radically different]] microarchitectures ([[Pentium Pro]] / [[Pentium II|II]] / [[Pentium III|III]] / [[Pentium 4|4]] / [[Pentium D|D]] / [[Pentium M|M]]). In 2006, the [[Pentium (brand)|''Pentium'' brand]] briefly disappeared from Intel's [[Technology roadmap|roadmaps]],<ref>{{cite news |title=Intel "Conroe-L" Details Unveiled |url=http://www.dailytech.com/article.aspx?newsid=4252 |publisher=DailyTech |accessdate=2007-08-16}}</ref><ref>[http://asia.cnet.com/reviews/pcperipherals/0,39051168,61998152-8,00.htm The multicore era is upon us - CNET Asia<!-- Bot generated title -->]</ref> only to re-emerge in 2007.<ref>{{cite news |title=Intel to unify product naming scheme |url=http://www.tgdaily.com/content/view/33234/122/ |publisher=TG Daily |accessdate=2007-08-12}}</ref> |
|||
[[Vinod Dham]] is often referred to as the father of the Intel Pentium processor,<ref name="podtech">{{cite web |url=http://www.podtech.net/home/1291/the-kamla-bhatt-show-vinod-dham-father-of-pentium-processor-on-investing-in-india |title=Vinod Dham, Father of Pentium Processor, on Investing in India |accessdate=2007-08-16 |date=2006-10-16 |publisher=PodTech.net |quote=Vinod Dham, Father of Pentium Processor}}</ref><ref name="ucmag">{{cite web |url=http://www.magazine.uc.edu/1000/dham.htm |title=The Technology Trailblazer: Vinod Dham |accessdate=2007-08-16 |last=Bach |first=John |year=2000 |month=10 |publisher=University Relations, University of Cincinnati |quote=Today, known in the industry as the ''Father of the Pentium''}}</ref> although many people, including [[John Crawford|John H. Crawford]] (of i386 and i486 alumni), were involved in the design and development of the processor. |
|||
The original Pentium's competitors included the [[Motorola 68060]] and the [[PowerPC 601]] as well as the [[SPARC]], [[MIPS]], and [[Alpha]] microprocessor families, most of which also used a superscalar in-order dual instruction pipeline configuration at some point. |
|||
==Improvements over i486== |
|||
* [[Superscalar]] architecture — The Pentium has two datapaths (pipelines) that allow it to complete two instructions per clock cycle in many cases. The main pipe (U) can handle any instruction, while the other (V) can handle the most common simple instructions. Some [[RISC]] proponents had argued that the "complicated" x86 instruction set would probably never be implemented by a tightly pipelined [[microarchitecture]], much less by a dual pipeline design. The 486 and the Pentium demonstrated that this was indeed possible and feasible. |
|||
* [[64-bit]] external databus doubles the amount of information read or written on each memory access and therefore allows the Pentium to load its caches faster than the 80486; it also allows faster access and storage of 64-bit and 80-bit [[x87]] [[FPU]] data. |
|||
* Much faster [[floating point]] unit. Some instructions showed an enormous improvement, most notably FMUL, with up to 15 times higher throughput than in the 80486 FPU. |
|||
* The [[microcode]] can employ both pipelines in order to enable auto-repeating instructions such as rep movsw perform one iteration every clock cycle, while the [[80486]] needed three clocks per iteration (and the earliest x86-chips significantly more than the 486). |
|||
* Virtualized interrupt to speed up [[virtual 8086 mode]]. |
|||
* Enhanced debug features with the introduction of the Processor-based debug port (See ''Pentium Processor Debugging'' in the Developers Manual, Vol 1). |
|||
* Enhanced self test features like the L1 cache parity check (see ''Cache Structure'' in the Developers Manual, Vol 1). |
|||
* The later '''Pentium MMX''' also added the [[MMX (instruction set)|MMX]] instruction set - A basic integer [[SIMD]] instruction set extension marketed for use in [[multimedia]] applications. These could not be used simultaneously with the [[x87]] FPU instructions because the registers were reused (to allow for fast context switches). |
|||
Pentium architecture chips offered just under twice the performance of a 486 processor per clock cycle. The fastest Intel 486 parts were almost as powerful as a first-generation Pentium, and the [[AMD]] [[Am5x86]] was roughly equal to the Pentium 75. |
|||
The Pentium ("Classic") series were designed to run at over 100 million [[instructions per second]] (MIPS),<ref>http://dede.essortment.com/pcusersguides_rjje.htm</ref> with the 75 MHz model running at 126.5 MIPS.<ref>http://www.islandnet.com/~kpolsson/micropro/proc1994.htm</ref> |
|||
==Models== |
|||
The Pentium was Intel's primary microprocessor for personal computers during the mid-1990s. The original design was reimplemented in newer processes and new features were added to maintain its competitiveness as well as to address specific markets such as portable computers. As a result, there were six variants of the Pentium. |
|||
===P5=== |
|||
[[Image:Intel Pentium arch.svg|right|thumb|150px|Intel Pentium microarchitecture.]] |
|||
The original Pentium microprocessor was code-named "P5". Its product code was 80501 (80500 for the earliest [[stepping (version numbers)|steppings]]) and it operated at 60 MHz and 66 MHz at 5V. It contained 3.1 million [[transistors]] and measured 16.7 mm by 17.6 mm for an area of 293.92 mm<sup>2</sup>.<ref name="MPR 1993-03-29">Case, Brian (29 March 1993). "Intel Reveals Pentium Implementation Details". ''[[Microprocessor Report]]''.</ref> It was fabricated in a [[800 nanometer|0.8 µm]] [[BiCMOS]] process. The use of 5 volt technology resulted in a massive energy consumption for that time and it soon became clear that faster processors were not possible with the P5 design. |
|||
===P54C=== |
|||
The P5 was followed by the P54C (80502), which operated at 75, 90 and 100 MHz. Microprocessors had always operated at 5V and this was the first Intel processor to operate at a lower voltage, 3.3V in order to reduce energy consumption. It employed an internal clock multiplier to let the internal circuitry work at a higher frequency than the front side bus, as it is much more difficult to increase the front side bus frequency. It also allowed two-way multiprocessing. It contained 3.3 million transistors and measured 163 mm<sup>2</sup>.<ref name="MPR 1995-03-27"/> It was fabricated in a 0.5 µm (described by Intel as "[[600 nanometer|0.6 µm]]") BiCMOS process.<ref name="MPR 1995-03-27"/> |
|||
===P54CQS=== |
|||
The P54C was followed by the P54CQS which operated at 120 MHz. It was fabricated in a [[350 nm|0.35 µm]] BiCMOS process, unlike early rumors of it being a CMOS design, and was the first commercial microprocessor to be fabricated in a 0.35 µm process.<ref name="MPR 1995-03-27">Gwennap, Linley (27 March 1995). "Pentium is First CPU to Reach 0.35 Micron". ''[[Microprocessor Report]]''.</ref> It had an identical transistor count to the P54C and despite the newer process, it had an identical area as well. The reason for this was because of time-to-market requirements. The chip was connected to the package using [[wire bonding]], which only allows connections along the edges of the chip. A smaller chip would have required a redesign of the package, as there is a limit on the length of the wires and the edges of the chip would be further away from the pads on the package. The solution was to keep the chip at the same size, retain the existing [[pad-ring]], and only reduce the size of the Pentium's logic circuitry to enable it to achieve higher clock frequencies.<ref name="MPR 1995-03-27"/> |
|||
===P54CS=== |
|||
The P54CQS was followed by the P54CS, which operated at 133, 150, 166 and 200 MHz. It contained 3.3 million transistors, measured 90 mm<sup>2</sup> and was fabricated in a 0.35 µm BiCMOS process with four levels of interconnect. |
|||
====Bugs and problems==== |
|||
The early versions of 60-100 MHz Pentiums had a problem in the floating point unit that resulted in incorrect (but predictable) results from some division operations. This bug, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became known as the [[Pentium FDIV bug]] and caused embarrassment for Intel, which created an exchange program to replace the faulty processors. Soon afterwards, a bug was discovered which could allow a malicious program to crash a system without any special privileges (the [[f00f]] bug); fortunately, operating systems were able to implement workarounds to prevent crashes. |
|||
The 60 and 66 MHz 0.8 [[micrometre|µm]] versions of the Pentium processors also had (for the time) high heat production due to their 5V operation, and were often known colloquially as "coffee warmers" or some similar nickname.{{Citation needed|date=February 2009}} The P54C used 3.3V and had significantly lower power draw (a quadratic relationship). P5 Pentiums used [[Socket 4]], while P54C started out on [[Socket 5]] before moving to [[Socket 7]] in later revisions. All desktop Pentiums from P54CS onwards used [[Socket 7]]. |
|||
====Pentium OverDrive==== |
|||
{{Main|Pentium OverDrive}} |
|||
The P24T [[Pentium OverDrive]] for [[Intel 80486|486]]-systems were released in 1995, which were based on 3.3V 0.6 µm versions using a 63 or 83 MHz clock. Since these used [[Socket 2]]/[[Socket 3|3]], some modifications had to be made to compensate for the 32-bit data bus and slower on-board L2 cache of [[Intel 80486|486]]-motherboards. They were therefore equipped with a 32[[KB]] L1 cache (double that of pre-P55C Pentiums). |
|||
===P55C, Tillamook=== |
|||
[[Image:Intel Pentium MMX Processor Logo.svg|left|thumb|100px|Pentium logo, with [[MMX (instruction set)|MMX]] enhancement]] |
|||
[[Image:Intel Pentium MMX arch.svg|right|150px|thumb|Intel Pentium MMX microarchitecture.]] |
|||
[[Image:P-MMX.JPG|right|thumb|150px|Pentium MMX 166 MHz without cover]] |
|||
The P55C (or 80503) was developed by Intel's Research & Development Center in [[Haifa, Israel]]. It was sold as '''Pentium with [[MMX (instruction set)|MMX]] Technology''' (usually just called '''Pentium MMX'''); although it was based on the P5 core it featured a new set of 57 "MMX" instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data. The Pentium MMX line was introduced on 22 October 1996.<ref>{{cite web |title=New Chip Begs New Questions |url=http://news.cnet.com/New-chip-begs-new-questions/2100-1001_3-240247.html?tag=mncol |publisher=CNet |accessdate=2009-02-06}}</ref> |
|||
The new instructions work on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. So, for example, the PADDUSB (Packed ADD Unsigned Saturated Byte) instruction adds two vectors, each containing eight 8-bit unsigned integers together, pairwise; each addition that would [[arithmetic overflow|overflow]] ''saturates'', yielding 255, the maximum unsigned value that can be represented in a byte. These rather specialized instructions generally require special coding by the programmer for them to be used. The performance of the P55C was improved over previous versions by a doubling of the Level 1 [[CPU cache]] from 16 KB to 32 KB. |
|||
It contained 4.5 million transistors and had an area of 140 mm<sup>2</sup>. It was fabricated in a 0.28 µm CMOS process with the same metal pitches as the previous 0.35 µm BiCMOS process, so Intel described it as "0.35 µm" because of its similar transistor density.<ref name="MPR 1996-03-05">Slater, Michael (5 March 1996). "Intel's Long-Awaited P55C Disclosed". ''[[Microprocessor Report]]''.</ref> The process has four levels of interconnect.<ref name="MPR 1996-03-05"/> |
|||
Pentium P55C notebook CPUs used a "mobile module" that held the CPU. This module was a [[printed circuit board|PCB]] with the CPU directly attached to it in a special smaller form factor. The module snapped to the notebook motherboard and typically a [[heat spreader]] plate was installed and made contact with the module. Such notebooks frequently used the Intel [[430MX]] chipset, a feature-reduced [[430FX]]. However, with the 0.25 µm ''Tillamook'' Mobile Pentium MMX (named after a [[Tillamook, Oregon|city in Oregon]]), the module also held the [[430TX]] chipset along with the system's 512 KB [[Static random access memory|SRAM]] cache memory. |
|||
While the P55C is compatible with the common [[Socket 7]] motherboard configuration, the voltage requirements for powering the chip differ from the standard Socket 7 specifications. Due to certain manufacturers not preparing for the introduction of MMX technology most motherboards manufactured for Socket 7 previous to the establishment of the P55C standard are not compliant with the dual intensity required for proper operation of this chip. The Intel Corporation temporarily manufactured a conversion kit called the OverDrive that was designed to correct this lack of planning on the motherboard manufacturers part. |
|||
==Models and variants== |
|||
{| class="wikitable" style="font-size: 90%;" |
|||
! |
|||
| colspan="1" | [[Image:KL Intel Pentium A80501.jpg|80px]] |
|||
| colspan="1" | [[Image:KL Intel Pentium P5.jpg|80px]] |
|||
| colspan="2" | [[Image:KL Intel Pentium 75.jpg|center|80px]] |
|||
| colspan="2" | [[Image:KL Intel Pentium 120.jpg|80px]] |
|||
| colspan="3" | [[Image:Intel Pentium 133.jpg|center|80px]] |
|||
| colspan="1" | [[Image:KL Intel Pentium P54C 200.jpg|80px]] |
|||
| colspan="3" | [[Image:KL Intel Pentium MMX.jpg|center|80px]] |
|||
| colspan="3" | [[Image:Intel Pentium MMX 166 PGA Front.jpg|center|80px]] |
|||
| colspan="4" | [[Image:KL Intel Pentium Mobile.jpg|center|80px]] |
|||
|- |
|||
! Code name |
|||
| colspan="2" | P5 |
|||
| colspan="4" | P54C |
|||
| colspan="4" | P54CS |
|||
| colspan="6" | P55C |
|||
| colspan="4" | ''Tillamook'' |
|||
|- |
|||
! Product code |
|||
| colspan="2" | 80500/ 80501 |
|||
| colspan="8" | 80502 |
|||
| colspan="10" | 80503 |
|||
|- |
|||
! Process size ([[micrometre|µm]]) |
|||
| colspan="2" | 0.80 |
|||
| colspan="4" | 0.60 or 0.35* |
|||
| colspan="4" | 0.35 |
|||
| colspan="6" | 0.35 (later 0.28) |
|||
| colspan="4" | 0.25 |
|||
|- |
|||
! Socket |
|||
| colspan="2" | Socket 4 |
|||
| colspan="8" | Socket 5/7 |
|||
| colspan="6" | Socket 7 |
|||
| colspan="4" | |
|||
|- |
|||
! Package |
|||
| colspan="2" | [[CPGA]] |
|||
| colspan="4" | CPGA/[[Tape Carrier Package|TCP]]* |
|||
| colspan="4" | CPGA/[[Pin Grid Array|PPGA]]/TCP* |
|||
| colspan="6" | CPGA/PPGA/TCP* |
|||
| colspan="4" | TCP/TCP on [[MMC-1]] |
|||
|- |
|||
! Clock speed ([[Megahertz|MHz]]) |
|||
| 60 |
|||
| 66 |
|||
| 75 |
|||
| 90 |
|||
| 100 |
|||
| 120 |
|||
| 133 |
|||
| 150 |
|||
| 166 |
|||
| 200 |
|||
| 120* |
|||
| 133* |
|||
| 150* |
|||
| 166 |
|||
| 200 |
|||
| 233 |
|||
| 200 |
|||
| 233 |
|||
| 266 |
|||
| 300 |
|||
|- |
|||
! Bus speed ([[Megahertz|MHz]]) |
|||
| 60 |
|||
| 66 |
|||
| 50 |
|||
| 60 |
|||
| 66 |
|||
| 60 |
|||
| 66 |
|||
| 60 |
|||
| colspan=2 | 66 |
|||
| 60 |
|||
| 66 |
|||
| 60 |
|||
| colspan=7 | 66 |
|||
|- |
|||
! Voltage |
|||
| 5.0 |
|||
| 5.0 |
|||
| 3.3 2,9* |
|||
| 3.3 2.9* |
|||
| 3.3 3.1* 2.9* |
|||
| 3.3 3.1* 2.9* |
|||
| 3.3 3.1* 2.9* |
|||
| 3.3 3.1* 2.9* |
|||
| 3.3 |
|||
| 3.3 |
|||
| 2.8 |
|||
| 2.45 |
|||
| 2.45 |
|||
| 2.8 |
|||
| 2.8 |
|||
| 2.8 |
|||
| 1.8 |
|||
| 1.8 |
|||
| 1.8 |
|||
| 1.8 |
|||
|- |
|||
! Introduced |
|||
| colspan="2" | 1993-03-22 |
|||
| 1994-10-10 |
|||
| colspan="2" | 1994-03-07 |
|||
| 1995-03-27 |
|||
| 1995-06 |
|||
| colspan="2" | 1996-01-04 |
|||
| 1996-06-10 |
|||
| colspan="3" | 1995-03-27 - 1995-11-01 <!-- What does this mean? --> |
|||
| colspan="2" | 1997-01-08 |
|||
| 1997-06-02 |
|||
| colspan="2" | 1997-08 |
|||
| 1998-01 |
|||
| 1999-01 |
|||
|- |
|||
| colspan="21" | ''An asterisk indicates that these were only available as Mobile Pentium or Mobile Pentium MMX chips for [[laptop]]s.'' |
|||
|- |
|||
|} |
|||
{| class="wikitable" |
|||
|+Pentium MMX OverDrive |
|||
! |
|||
| colspan="7" | [[Image:KL Intel Pentium MMX Overdrive A.jpg|center|80px]] |
|||
|- |
|||
! Code name |
|||
| colspan="6" | P54CTB |
|||
|- |
|||
! Product code |
|||
| colspan="2" | PODPMT60X150 |
|||
| PODPMT66X166 |
|||
| colspan="2" | PODPMT60X180 |
|||
| PODPMT66X200 |
|||
|- |
|||
! Process size (µm) |
|||
| colspan="7" | 0.35 |
|||
|- |
|||
! Socket |
|||
| colspan="6" | Socket 5/7 |
|||
|- |
|||
! Package |
|||
| colspan="6" | [[CPGA]] with heatsink, fan and voltage regulator |
|||
|- |
|||
! Clock speed (MHz) |
|||
| 125 |
|||
| 150 |
|||
| 166 |
|||
| 150 |
|||
| 180 |
|||
| 200 |
|||
|- |
|||
! Bus speed (MHz) |
|||
| 50 |
|||
| 60 |
|||
| 66 |
|||
| 50 |
|||
| 60 |
|||
| 66 |
|||
|- |
|||
! Upgrade for |
|||
| Pentium 75 |
|||
| Pentium 90 |
|||
| Pentium 100 and 133 |
|||
| Pentium 75 |
|||
| Pentium Pentium 90, 120 and 150 |
|||
| Pentium 100, 133 and 166 |
|||
|- |
|||
! [[Thermal Design Power|TDP]] (max. W) |
|||
| colspan="2" | 15,6 |
|||
| 15,6 |
|||
| colspan="2" | 15,6 |
|||
| 18 |
|||
|- |
|||
! Voltage |
|||
| colspan="2" | 3,3 |
|||
| 3,3 |
|||
| colspan="2" | 3,3 |
|||
| 3,3 |
|||
|} |
|||
{| class="wikitable" |
|||
|+Embedded versions of Pentium MMX |
|||
! |
|||
| colspan="4" | [[File:KL Intel Pentium MMX embedded Top.jpg|center|80px]] |
|||
| colspan="3" | [[File:KL Intel Embedded Pentium MMX PGA Bottom.jpg|center|80px]] |
|||
|- |
|||
! Code name |
|||
| colspan="2" | P55C |
|||
| colspan="5" | ''Tillamook'' |
|||
|- |
|||
! Product code |
|||
| FV8050366200 |
|||
| FV8050366233 |
|||
| FV80503CSM66166 |
|||
| GC80503CSM66166 |
|||
| GC80503CS166EXT |
|||
| FV80503CSM66266 |
|||
| GC80503CSM66266 |
|||
|- |
|||
! Process size ([[micrometre|µm]]) |
|||
| colspan="2" | 0.35 |
|||
| colspan="5" | 0.25 |
|||
|- |
|||
! Clock speed ([[Megahertz|MHz]]) |
|||
| 200 |
|||
| 233 |
|||
| 166 |
|||
| 166 |
|||
| 166 |
|||
| 266 |
|||
| 266 |
|||
|- |
|||
! Bus speed ([[Megahertz|MHz]]) |
|||
| 66 |
|||
| 66 |
|||
| 66 |
|||
| 66 |
|||
| 66 |
|||
| 66 |
|||
| 66 |
|||
|- |
|||
! Package |
|||
| [[Pin Grid Array|PPGA]] |
|||
| PPGA |
|||
| PPGA |
|||
| [[Ball Grid Array|BGA]] |
|||
| BGA |
|||
| PPGA |
|||
| BGA |
|||
|- |
|||
! [[Thermal Design Power|TDP]] (max. W) |
|||
| 15,7 |
|||
| 17 |
|||
| 4.5 |
|||
| 4.1 |
|||
| 4.1 |
|||
| 7.6 |
|||
| 7.6 |
|||
|- |
|||
! Voltage |
|||
| 2.8 |
|||
| 2.8 |
|||
| 1.9 |
|||
| 1.8 |
|||
| 1.8 |
|||
| 1.9 |
|||
| 2.0 |
|||
|} |
|||
==See also== |
|||
*[[CPU design]] |
|||
*[[Cache on a stick|COASt]] (Cache On A Stick), L2 cache modules for Pentium |
|||
*[[IA-32]] [[instruction set architecture]] (ISA) |
|||
*[[Pentium compatible processor]] |
|||
===Competitors=== |
|||
* [[AMD K5]], [[AMD K6]] |
|||
* [[Cyrix 6x86]] |
|||
* [[WinChip|WinChip C6]] |
|||
* [[Nx586|NexGen Nx586]] |
|||
* [[mP6|Rise mP6]] |
|||
==References== |
|||
{{reflist}} |
|||
==External links== |
|||
* [http://www.cpu-collection.de/?tn=0&l0=co&l1=Intel&l2=Pentium%20P54 CPU-Collection.de] - Intel Pentium images and descriptions |
|||
* [http://www.plasma-online.de/english/identify/picture/intel_cpu.html Plasma Online Intel CPU Identification] |
|||
* [http://www.chipdb.org/cat-pentium-417.htm Pictures of all known Pentium chips at chipdb.org] |
|||
* [http://www.chipdb.org/index.php?template=timeline The Pentium Timeline Project] The Pentium Timeline Project maps oldest and youngest chip known of every s-spec made. Data are shown in a interactive timeline. |
|||
'''Intel Datasheets''' |
|||
* [http://datasheets.chipdb.org/Intel/x86/Pentium/24159502.PDF Pentium (P5)] |
|||
* [http://datasheets.chipdb.org/Intel/x86/Pentium/24199710.PDF Pentium (P54)] |
|||
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24318504.PDF Pentium MMX (P55C)] |
|||
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24329204.PDF Mobile Pentium MMX (P55C)] |
|||
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24346802.PDF Mobile Pentium MMX (Tillamook)] |
|||
'''Intel Manuals'''<br> |
|||
These Manuals do provide a overview of the Pentium Processor and its features: |
|||
* Pentium® Processor Family Developer’s Manual [http://download.intel.com/design/intarch/manuals/24142805.pdf Pentium® Processor (Volume 1)] (Intel Order Number 241428) |
|||
* Pentium® Processor Family Developer’s Manual [ftp://download.intel.com/design/pentium/manuals/24319101.PDF Volume 2: Instruction Set Reference] (Intel Order Number 243191) |
|||
* Pentium® Processor Family Developer’s Manual [ftp://download.intel.com/design/pentium/manuals/24143004.pdf Volume 3: Architecture and Programming Manual] (Intel Order Number 241430) |
|||
{{Intel processors|p5}} |
|||
[[Category:1993 introductions]] |
|||
[[Category:Intel x86 microprocessors]] |
|||
[[bn:পেন্টিয়াম]] |
|||
[[ca:Pentium]] |
|||
[[cs:Pentium]] |
|||
[[da:Pentium]] |
|||
[[de:Intel Pentium]] |
|||
[[et:Pentium]] |
|||
[[es:Intel Pentium]] |
|||
[[eo:Pentium]] |
|||
[[fa:پنتیوم]] |
|||
[[fr:Intel P5]] |
|||
[[ko:펜티엄]] |
|||
[[hr:Intel Pentium]] |
|||
[[id:Pentium]] |
|||
[[is:Pentium]] |
|||
[[it:Pentium]] |
|||
[[he:פנטיום]] |
|||
[[lt:Pentium]] |
|||
[[hu:Pentium]] |
|||
[[nl:Pentium]] |
|||
[[ja:Pentium]] |
|||
[[no:Pentium]] |
|||
[[pl:Pentium]] |
|||
[[pt:Pentium]] |
|||
[[ru:Pentium]] |
|||
[[simple:Pentium]] |
|||
[[sk:Pentium]] |
|||
[[fi:Intel Pentium]] |
|||
[[sv:Pentium]] |
|||
[[th:เพนเทียม]] |
|||
[[tr:Pentium]] |
|||
[[uk:Pentium]] |
|||
[[zh:奔騰]] |
Revision as of 10:30, 3 June 2010
Redirect to: