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Note: The remaining text will be rewritten and used to expand the STM32 article!

STM32

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STM32 Family [1]
General information
Launched2007
DiscontinuedCurrent
Designed bySTMicroelectronics
Performance
Max. CPU clock rate24  to 168 MHz
Architecture and classification
Technology node130 to 90 nm
MicroarchitectureARM Cortex-M4F [2]
ARM Cortex-M3 [3]
ARM Cortex-M0 [4]

Overview

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Memory

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Describe from a high-level general point of view of all the series. What is common across all the series and what is unique to specific series?

All STM32 series contain NOR-Flash (which allows direct code execution) and Static RAM, of which a portion of the RAM has the ability to be battery-backed. Each STM32 has one or more banks of flash, and one or more banks of static ram.

Some STM32 also has ROM, OTP, EEPROM, special high speed ram (tied to ARM core), special ram for peripherals like USB / ethernet / flash ECC engine, ...

ART has a 128bit wide interface to the flash, which allows up to eight instructions to be loaded at a time. The ART features 64 128bit registers for code and a further eight 128bit registers for data. If your code has branches, once it has been fetched from flash, it will in most cases remain in this matrix and the instructions will be available with zero wait states. (((Describe which STM32 series has ART capabilities.)))

Peripherals

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Describe from a high-level general point of view of all the series. What is common across all the series and what is unique to specific series?

All microcontrollers contain peripherals that vary from family to family. In earlier microcontrollers, peripherals would be dedicated to specific IC pins. As microcontrollers evolved, so did the change to configurable connections to the pins. Over time the number of peripherals has increased to a point where there are now more peripherals than can be mapped to IC pins, and the STM32 is no exception. Some pins on the STM32 are dedicated, but most are multipurpose and configurable choice between GPIO (General Purpose I/O) or connections to peripherals. Lower pin count IC packages require careful planning to ensure wanted features are available on the pins being used. Highest pin count IC packages have the fewest peripheral to pin conflicts thus allowing you to use more peripherals. Some popular peripheral connections are available on multiple IC pins to ensure the popular peripherals can be accessed. Since there are numerous peripheral to pin limitations, it can be time consuming to ensure there aren't any conflicts. ST provides software, called MicroXplorer, to allocate and configure STM32 pins, see development tools section.[5]

Buses
Memory Interfaces
Computational Engines
  • Crypto / Hash Processor, RNG generator, CRC engine, ...
Timers
  • 16-bit, 32-bit, Watchdog. (((multiple flavors of watchdogs???)))
I/O
  • Digital Ports (((types of logic and pullups???))), Analag A/D, D/A.

Clocks and Power

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Describe from a high-level general point of view of all the series. What is common across all the series and what is unique to specific series?

Footprint compatibility

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From STM32F405/7 datasheet: "The STM32F405xx and STM32F407xx are part of the STM32F4 family. They are fully pin-to-pin, software and feature compatible with the STM32F2xx devices, allowing the user to try different memory densities, peripherals, and performances (FPU, higher frequency) for a greater degree of freedom during the development cycle. The STM32F405xx and STM32F407xx devices maintain a close compatibility with the whole STM32F10xxx family. All functional pins are pin-to-pin compatible. The STM32F405xx and STM32F407xx, however, are not drop-in replacements for the STM32F10xxx devices: the two families do not have the same power scheme, and so their power pins are different. Nonetheless, transition from the STM32F10xxx to the STM32F40x family remains simple as only a few pins are impacted." Rewrite! Describe number of pin differences for each package style.

Debugging

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A debugger is integrated within the ARM core of each chip to allow a host to control, debug, download to the microcontroller. Depending on the chip, features may include code breakpoints, data watchpoints, flash patch breakpoints, SWV (serial wire viewer), and trace.[citation needed]

The ARM debug interface is a combined 4/5-pin JTAG and 2-pin SWD (Serial Wire Debug) port that enables either a JTAG or SWD probe to STM32. On some parts, if SWD is used, then up to 3 JTAG pins can be redefined as GPIO or alternative functions.[citation needed]

On some high pin count parts, real-time instruction and data flow can be recorded through the ETM (Embedded Trace Macrocell). It uses up to 5 ETM pins to stream compressed data at a very high rate from the microcontroller to an external hardware trace port analyzer (TPA) device.[citation needed]

An external debugging device is attached to the PCB using a variety of connectors.[6] The JTAG 20-pin (0.1" center) IDC connector is the most popular because it was the first ARM debug connector to be standardized. The ARM Cortex family brought about the new SWD debug pins, thus a new smaller connector called the "Cortex Debug Connector" standard was created using 10-pin (0.05") Samtec FTSH micro header.[7] Additional styles of connectors are available to support trace, but few 3rd-party boards support it because external trace devices are more expensive thus fewer developers using them.This is a new paragraph. Refine and expand!

Add new paragraph here about various software development packages having integrated debugging capabilites, include discusion about GDB (GNU Debugger).

STMicroelectronics provides STM-STDIO freeware to help debug and diagnose STM32 applications while they are running by reading and displaying their variables in real-time. See the development tools section.[8]

Programming

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I need to describe the methods to program the internal flash for each series. Debuggers (previous section), UART, USB, ... Describe Boot ROM concept and options available for each series. Describe how to enable/disable boot rom and choose booting methods. The newer chips might be factory-programmed-flash instead of ROM...not sure yet. Talk about 2 special pins.

Copy of references missing from this sandbox, but exist in STM32

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References

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